HD74AC280

HD74AC280/HD74ACT280 9-bit Parity Generator/Checker Description The HD74AC280/HD74ACT280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is High. If an even number of inputs is High, the Sum Even output is High. If an odd number is High, the Sum Even output is Low. The Sum Odd output is the complement of the Sum Even output. Features Outputs Source/Sink 24 mA HD74ACT280 has TTL-Cmpatible Inputs Pin Arrangement I6 1 I7 2 NC 3 I8 4 ΣE 5 ΣO 6 GND 7 (Top view) 14 VCC 13 I5 12 I4 11 I3 10 I2 9 I1 8 I0 HD74AC280/HD74ACT280 Logic Symbol I0 I1 I2 I3 I4 I5 I6 I7 I8 ΣO ΣE Pin Names I0 – I8 O E Data Inputs Odd Parity Output Even Parity Output Truth Table Outputs Number of High Inputs I0 – I 8 0, 2, 4, 6, 8 1, 3, 5, 7, 9 H : L : High Voltage Level Low Voltage Level ∑ Even H L ∑ Odd L H 2 HD74AC280/HD74ACT280 Logic Diagram I8 I7 I6 I5 I4 I3 I2 I1 I0 ΣO ΣE Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 HD74AC280/HD74ACT280 DC Characteristics (unless otherwise specified) Item Maximum quiescent supply current Maximum quiescent supply current Maximum ICC/input (HD74ACT280) Symbol I CC I CC I CCT Max 80 8.0 1.5 Unit µA µA mA Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C VIN = VCC – 2.1 V, VCC = 5.5 V, Ta = Worst case A...