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HD74ACT112 Dataheets PDF



Part Number HD74ACT112
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description Dual JK Negative Edge-Triggered Flip-Flop
Datasheet HD74ACT112 DatasheetHD74ACT112 Datasheet (PDF)

HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the f.

  HD74ACT112   HD74ACT112


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