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HD74ACT112

Hitachi Semiconductor

Dual JK Negative Edge-Triggered Flip-Flop


Description
HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will ...



Hitachi Semiconductor

HD74ACT112

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