HD74ACT125

HD74AC125/HD74ACT125 Quad Buffer/Line Driver with 3-State Output Description The HD74AC125/HD74ACT125 is an quad buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/receiver which provides improved PC board density. Features 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Outputs Source/Sink 24 mA HD74ACT125 has TTL-Compatible Inputs Pin Arrangement E 1 D 2 O 3 E 4 D 5 O 6 GND 7 (Top view) 14 VCC 13 E 12 D 11 O 10 E 9 D 8 O HD74AC125/HD74ACT125 Logic Symbol D O E Pin Names D E O Data Inputs 3-State Output Enable Inputs (Active Low) Outputs Truth Table Inputs E L L H H L X Z : : : : High Voltage Level Low Voltage Level Immaterial High Impedance D L H X Output L H Z DC Characteristics (unless otherwise specified) Item Maximum quiescent supply current Maximum quiescent supply current Maximum ICC/input (HD74ACT125) Symbol I CC I CC I CCT Max 80 8.0 1.5 Unit µA µA mA Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C VIN = VCC – 2.1 V, VCC = 5.5 V Ta = Worst case 2 HD74AC125/HD74ACT125 AC Characteristics: HD74AC125 Ta = +25°C CL = 50 pF Item Propagation delay Symbol t PLH VCC (V)*1 3.3 5.0 Propagation delay t PHL 3.3 5.0 Enable time t PZH 3.3 5.0 Enable time t PHZ 3.3 5.0 Disable time t PZL 3.3 5.0 Disable time t PLZ 3.3 5.0 Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Min 1.0 1.0 1.0 1.0 1.0 ...