HD74HC126

HD74HC125/HD74HC126 Quad. Bus Buffer Gates (with 3-state outputs) Description The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into high impedance. Features High Speed Operation: tpd = 8 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs C HC125 H L L X : Z : HC126 L H H A X L H Output Y HC125 Z L H HC126 Z L H Irrelevent Off (high-impedance) state of a 3-state output. HD74HC125/HD74HC126 Pin Arrangement HD74HC125 1C 1A 1Y 2C 2A 2Y GND 1 2 3 4 5 6 7 (Top view) 14 13 12 11 10 9 8 VCC 4C 4A 4Y 3C 3A 3Y HD74HC126 1C 1A 1Y 2C 2A 2Y GND 1 2 3 4 5 6 7 (Top view) 14 13 12 11 10 9 8 VCC 4C 4A 4Y 3C 3A 3Y 2 HD74HC125/HD74HC126 Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage Output current DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperautre Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150 Unit V V V mA mA mA mA mW °C 3 HD74HC125/HD74HC126 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0....