HD74HC174

HD74HC174 Hex D-type Flip-Flops (with Clear) Description This device contains 6 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low, sets all outputs to a low state. Features High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Clear L H H H H L Clock X D X H L X X Outputs Q L H L no change no change HD74HC174 Pin Arrangement Clear 1 1Q 2 1D 3 2D 4 2Q 5 3D 6 3Q 7 GND 8 (Top view) Q CLR D CK Q CLR CK D 16 VCC 15 6Q 14 6D 13 5D 12 5Q 11 4D 10 4Q 9 Clock D CK CLR Q CK D CLR Q D CK CLR Q CK D CLR Q Logic Diagram Clock 1D Clear CK 2D D CL Q 2Q CK D CL Q 1Q CK 3D D CL Q 3Q CK 4D D CL Q 4Q CK 5D D CL Q 5Q CK 6D D CL Q 6Q 2 HD74HC174 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0.5 1.35 1.8 — — — — — 0.1 0.1 0.1 0.33 0.33 ±1.0 40 µA µA I OL = 4 mA I OL = 5.2 mA Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = –4 mA I OH = –5.2 mA Vin = VIH or VIL I OL = 20 µA V Vin = VIH or VIL I OH = –20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 — 3.15 — 4.2 — — — — — — — — — — 0.5 1.5 3.15 4.2 — VIL 2....