SAA32M8

® 256Mb: x4, x8, x16 DDR2 SDRAM SAA64M4.....– 16 Meg x 4 x 4 SAA32M8.....– 8 Meg x 8 x 4 SAA16M16.....– 4 Meg x 16 x 4 For the latest data sheet, please refer to the SpecTek Web site: http://www.spectek.com DDR2 SDRAM Features ROHS compliant VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Four-bit prefetch architecture DLL to align DQ and DQS transitions with CK Four internal banks for concurrent operation Programmable CAS Latency (CL): 3 and 4 Posted CAS additive latency (AL): 0, 1, 2, 3, and 4 WRITE latency = READ latency - 1 tCK Programmable burst lengths: 4 or 8 Adjustable data-output drive strength 64ms, 8,192-cycle refresh On-die termination (ODT) Options1, 2 SpecTek Memory Configuration 64 Meg x 4 (16 Meg x 4 x 4) 32 Meg x 8 ( 8 Meg x 8 x 4) 16 Meg x 16 (4 Meg x 16 x 4) Product Code DDR2 Density 256 Megabits Voltage/Refresh 1.8V/8K refresh Package – Lead-Free x4, x8 60-ball FBGA (8mm x 12mm) x16 84-ball FBGA (8mm x 14mm) Package – Leaded x4, x8 60-ball FBGA (8mm x 12mm) x16 84-ball FBGA (8mm x 14mm) Timing – Cycle Time 3.0ns @ CL = 5 (DDR2-667) 3.75ns @ CL = 4 (DDR2-533) NOTE: Designation SAA Architecture 64 Meg x 4 16 Meg x 4 x 4 8K 8K (A0–A12) 4 (BA0–BA1) 2K (A0–A9, A11) 32 Meg x 8 8 Meg x 8 x 4 8K 8K (A0–A12) 4 (BA0–BA1) 1K (A0–A9) 16 Meg x 16 4 Meg x 16 x 4 8K 8K (A0–A12) 4 (BA0–BA1) 512 (A0–A8) 64M4 32M8 16M16 Ux3 6x3 O8 Configuration ...