4-bit Latch/4-to-16-line Decoder
HD74HC4515
4-bit Latch/4-to-16-line Decoder
Description
This device presents 4-to-16 line decoder with latched inputs. ...
Description
HD74HC4515
4-bit Latch/4-to-16-line Decoder
Description
This device presents 4-to-16 line decoder with latched inputs. The HD74HC4515 presents a low level at the selected output. This device consists of four storage latches with common strobe and inhibit (G) inputs. When a low signal is applied to the strobe input, the input data is stored, decoded, and presented to the output. When inhibit is high, all HD74HC4515 outputs are a high logic level.
Features
High Speed Operation: tpd (Data to S) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
HD74HC4515
Function Table (Strobe = High)
Data Inputs Inhibit L L L L L L L L L L L L L L L L H D L L L L L L L L H H H H H H H H X C L L L L H H H H L L L L H H H H X B L L H H L L H H L L H H L L H H X A L H L H L H L H L H L H L H L H X Select Outputs S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 All output “H”
2
HD74HC4515
Pin Arrangement
Strobe Data 1 Data 2 S7 S6 S5 S4 S3 S1
1 2 3 4 B A D C 5 6 7 8 9 4 to 16 Decoder Latch
24 23 22 21 20 19 18 17 16 15 14 13 (Top view)
VCC Inhibit Data 4 Data 3 S10 S11 S8 S9 S14 S15 S12 S13
S2 10 S0 11 GND 12
3
HD74HC4515
Logic Diagram
S0 S1 S2
D1 IN S Q Q
S3 S4 S5
D2
S6 S7 S8
D3
S9 S10
D4
S11 S12 S13
Inhibit
S14 S15
Strobe
4
HD74HC4515
DC Characteristics
Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°...
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