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HD74HCT534 Dataheets PDF



Part Number HD74HCT534
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description Octal D-type Flip-Flops(with inverted 3-state outputs)
Datasheet HD74HCT534 DatasheetHD74HCT534 Datasheet (PDF)

HD74HCT374/HD74HCT534 Octal D-type Flip-Flops (with 3-state outputs)/ Octal D-type Flip-Flops (with inverted 3-state outputs) Description These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is.

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HD74HCT374/HD74HCT534 Octal D-type Flip-Flops (with 3-state outputs)/ Octal D-type Flip-Flops (with inverted 3-state outputs) Description These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Output Control L L L H X : Z : L X Clock D H L X X HD74HCT374 Q H L No change Z HD74HCT534 Q L H No change Z Irrelevant Off (high-impedance) state of a 3-state output. HD74HCT374/HD74HCT534 Pin Arrangement HD74HCT374 Output Control 1 1Q 1D 2D 2Q 3Q 3D 4D 4Q 2 3 4 5 6 7 8 9 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock (Top view) GND 10 HD74HCT534 Output Control 1 1Q 1D 2D 2Q 3Q 3D 4D 4Q 2 3 4 5 6 7 8 9 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock (Top view) GND 10 2 HD74HCT374/HD74HCT534 Block Diagram HD74HCT374 1D D Q C Q Clock 2D D Q C Q 3D D Q C Q 4D D Q C Q 5D D Q C Q 6D D Q C Q 7D D Q C Q 8D D Q C Q Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q HD74HCT534 1D D Q C Q Clock 2D D Q C Q 3D D Q C Q 4D D Q C Q 5D D Q C Q 6D D Q C Q 7D D Q C Q 8D D Q C Q Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 3 HD74HCT374/HD74HCT534 Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage DC current drain per pin DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150 Unit V V V mA mA mA mA mW °C DC Characteristics Ta = 25°C Item Input voltage Symbol VIH VIL Output voltage VOH Ta = –40 to +85°C Max — 0.8 — — 0.1 0.33 ±5.0 ±1.0 40 µA µA µA V Unit V V V Test Conditions VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 5.5 5.5 Vin = VIH or VIL I OH = –20 µA I OH = –6 mA Vin = VIH or VIL I OL = 20 µA I OL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA Min Typ Max Min 2.0 — 4.4 — — — — 2.0 0.8 — — — 4.4 4.13 4.18 — VOL — — Off-state output current Input current I OZ Iin — — — — — — — — 0.1 — 0.26 — ±0.5 — ±0.1 — 4.0 — Quiescent current I CC 4 HD74HCT374/HD74HCT534 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Maximum clock frequency Symbol f max Ta = –40 to +85°C Max 24 35 35 38 38 38 38 — — — 15 10 ns ns ns ns pF ns ns Unit MHz ns Test Conditions VCC (V) 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 — Data to clock Clock to data Clock, output control Min Typ Max Min — — — — — — — 20 5 16 — — — 12 15 16 15 13 16 2 0 5 4 5 30 28 28 30 30 30 30 — — — 12 10 — — — — — — — 25 6 20 — — Propagation delay t PLH time Output enable time Output disable time Setup time Hold time Pulse width Output rise/fall time Input capacitance t PHL t ZL t ZH t LZ t HZ t su th tw t TLH t THL Cin 5 Unit: mm 24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89 1.27 Max 10 1.30 2.54 Min 5.08 Max 7.62 0.51 Min 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.11 Hitachi Code JEDEC EIAJ Weight (reference value) DP-20N — Conforms 1.26 g Unit: mm 12.6 13 Max 20 11 1 10 5.5 0.80 Max 2.20 Max *0.22 ± 0.05 0.20 ± 0.04 0.20 7.80 + – 0.30 1.15 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DA — Conforms 0.31 g Unit: mm 12.8 13.2 Max 20 11 7.50 1 0.935 Max 10 2.65 Max *0.27 ± 0.05 0.25 ± 0.04 0.25 10.40 + – 0.40 1.45 0° – 8° 0.57 0.70 + – 0.30 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.12 M *Dimension including the plating thickness Base material dimension 0.20 ± 0.10 0.15 Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DB Conforms — 0.52 g Unit: mm 6.50 6.80 Max 20 11 4.40 1 10 0.65 0.20 ± 0.06 *0.22+0.08 –0.07 0.13 M 0.65 Max *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.07 +0.03 –0.04 0° – 8° 0.50 ± 0.10 1.0 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) TTP-20DA — — 0.07 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights .


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