DatasheetsPDF.com

HD74HCT640 Dataheets PDF



Part Number HD74HCT640
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description Octal Bus Transceivers (with 3-state outputs)
Datasheet HD74HCT640 DatasheetHD74HCT640 Datasheet (PDF)

HD74HCT640/HD74HCT643 Octal Bus Transceivers (with 3-state outputs) Description Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G ), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus. Features .

  HD74HCT640   HD74HCT640



Document
HD74HCT640/HD74HCT643 Octal Bus Transceivers (with 3-state outputs) Description Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G ), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Control Input G L L H DIR L H X Operation HD74HCT640 B data to A bus A data to B bus Isolation HD74HCT643 B data to A bus A data to B bus Isolation HD74HCT640/HD74HCT643 Pin Arrangement HD74HCT640 DIR A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 20 VCC 19 Enable G 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 B8 (Top view) GND 10 2 HD74HCT640/HD74HCT643 HD74HCT643 DIR A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 20 VCC 19 Enable G 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 B8 (Top view) GND 10 Block Diagram HD74HCT640 G DIR VCC A B VCC To 7 other inverters To 7 other inverters 3 HD74HCT640/HD74HCT643 HD74HCT643 G DIR VCC A B VCC To 7 other inverters To 7 other inverters Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage DC current drain per pin DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150 Unit V V V mA mA mA mA mW °C 4 HD74HCT640/HD74HCT643 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH VIL Output voltage VOH Ta = –40 to +85°C Max — 0.8 — — 0.1 0.33 ±5.0 ±1.0 40 µA µA µA V Unit V V V Test Conditions VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 5.5 5.5 Vin = VIH or VIL I OH = –20 µA I OH = –6 mA Vin = VIH or VIL I OL = 20 µA I OL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA Min Typ Max Min 2.0 — 4.4 — — — — 2.0 0.8 — — — 4.4 4.13 4.18 — VOL — — Off-state output current Input current I OZ Iin — — — — — — — — 0.1 — 0.26 — ±0.5 — ±0.1 — 4.0 — Quiescent current I CC AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol Ta = –40 to +85°C Max 23 23 58 58 54 54 15 10 ns pF ns ns Unit ns Test Conditions VCC (V) 4.5 4.5 4.5 4.5 4.5 4.5 4.5 — Min Typ Max Min — — — — — — — — 13 16 16 16 17 21 4 5 18 18 46 46 43 43 12 10 — — — — — — — — Propagation delay t PLH time Output enable time Output disable time Output rise/fall time Input capacitance t PHL t ZH t ZL t HZ t LZ .


HD74HCT623 HD74HCT640 HD74HCT643


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)