PALCE22V10

FINAL COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/20/25 PALCE22V10 Family 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS s As fast as 5-ns propagation delay and 142.8 MHz fMAX (external) s Low-power EE CMOS s 10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs s Varied product term distribution allows up to 16 product terms per output for complex functions s Peripheral Component Interconnect (PCI) compliant (-5/-7/-10) s Global asynchronous reset and synchronous preset for initialization s Power-up reset for initialization and register preload for testability s Extensive third-party software and programmer support through FusionPLD partners s 24-pin SKINNYDIP, 24-pin SOIC, 24-pin Flatpack and 28-pin PLCC and LCC packages save space s 5-ns and 7.5-ns versions utilize split leadframes for improved performance GENERAL DESCRIPTION The PALCE22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count. The PAL device implements the familiar Boolean logic transfer function, the sum of products. The PAL device is a programmable AND array driving a fixed OR array. The AND array is programmed to create custom product terms, while the OR array sums selected terms at the outputs. The product terms are connected to the fixed OR array with a varied distribution from 8 to16 across the outputs (see Block Diagram). The OR sum of the products feeds th...