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AT42QT5480 Dataheets PDF



Part Number AT42QT5480
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description 10-bit Touchscreen Controller
Datasheet AT42QT5480 DatasheetAT42QT5480 Datasheet (PDF)

Features • Configurations: – Can be configured as a combination of touchscreen, sliders/wheels and keys, with Adjacent Key Suppression™ (AKS™) technology between groups QField™ Touchscreen: – Two-touch capable with independent XY tracking for one or two concurrent touches in real time, with touch size reporting – Up to eight-inch diagonal screen size supported – 1024 x 1024 resolution Discrete Keys: – Up to 48 (subject to other configurations) QSlide™/QWheel™: – Configurable up to six independen.

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Features • Configurations: – Can be configured as a combination of touchscreen, sliders/wheels and keys, with Adjacent Key Suppression™ (AKS™) technology between groups QField™ Touchscreen: – Two-touch capable with independent XY tracking for one or two concurrent touches in real time, with touch size reporting – Up to eight-inch diagonal screen size supported – 1024 x 1024 resolution Discrete Keys: – Up to 48 (subject to other configurations) QSlide™/QWheel™: – Configurable up to six independent sliders/wheels Linearity: – Screen design dependent but typically better than ±1 percent Filtering: – Advanced digital filtering (user configurable) Response Times: – Sub 15 ms possible, depending on filter settings General Purpose Outputs (GPOs): – Up to four user controllable outputs Technology: – Patented charge-transfer (transverse mode) Panel Thickness: – Glass up to 5 mm, screen size dependent – Plastic up to 3 mm, screen size dependent Channel Sensitivity: – Individually settable via simple commands over serial interface Interface: – I2C-compatible slave mode, 100 kHz or 400 kHz with 2.7V or greater Vdd Power: – 1.8V to 5.5V (2.7V to 5.5V in high speed mode) Packages: – 44-pin 7 x 7 mm MLF RoHS compliant – 44-pin 10 x 10 mm TQFP RoHS compliant – 49-ball 5 x 5 mm BGA RoHS compliant Signal Processing: – Self-calibration, auto drift compensation, noise filtering, Adjacent Key Suppression technology • • • • • • • • • QTwo™ 10-bit Touchscreen Controller AT42QT5480 Summary • • • • • Note: This is a summary document. A complete document is available under NDA. For more information contact www.atmel.com/touchscreen. 9510AS–AT42–10/08 1. Pinout and Schematic 1.1 Pinout Configurations CHANGE GPO1 1 2 3 4 5 6 7 8 9 10 GPO0 SMP VREF Y0B Vdd Vss Y3B Y2B Y4B Y5B FORCE_S A0 Vdd Vss Vdd Y5A Y4A Y3A Y2A Y1B GPO2 GPO3 TRIGGER RST Vdd Vss XT2 XT1 X0 X1 X2 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 QT5480 28 27 26 25 24 11 23 12 13 14 15 16 17 18 19 20 21 22 X3 X6 X5 X4 X7 Vdd SCL Vss SDA Y1A Y0A QT5480 2 QT5480 9510AS–AT42–10/08 QT5480 1.2 Pin Descriptions Pin Listing Ball B2 B1 C3 C2 A5 A1 D2 E1 D3 E2 F1 F2 G2 E3 F3 E4 C1 A4 F4 G5 F5 G6 F6 E5 F7 E6 E7 A7 C7 D6 C6 B7 D5 B6 A6 Name GPO2 GPO3 TRIGGER RST Vdd Vss XT2 XT1 X0 X1 X2 X3 X4 X5 X6 X7 Vdd Vss SCL SDA Y0A Y1A Y2A Y3A Y4A Y5A Vdd Vss Vdd A0 FORCE_S Y5B Y4B Y3B Y2B Type O O I I P P X X O O O O O O O O P P OD OD I I I I I I P P P I I I I I I Comments General purpose output 2 General purpose output 3 Trigger input (active low) Reset low; has internal 30k - 60k pull-up Power Supply ground Clock resonator Clock resonator X matrix drive line X matrix drive line X matrix drive line X matrix drive line X matrix drive line X matrix drive line X matrix drive line X matrix drive line Power Supply ground Serial Interface Clock Serial Interface Data Y line connection Y line connection Y line connection Y line connection Y line connection Y line connection Power Supply ground Power I2C-compatible address select Force sensor input Y line connection Y line connection Y line connection Y line connection If Unused, Connect To... Leave open Leave open Vss Leave open or Vdd – – – – Leave open Leave open Leave open Leave open Leave open Leave open Leave open Leave open – – – – Leave open Leave open Leave open Leave open Leave open Leave open – – – – Vdd or Vss Leave open Leave open Leave open Leave open Table 1-2. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 3 9510AS–AT42–10/08 Table 1-2. Pin 36 37 38 39 40 41 42 43 44 – – – – – Pin Listing (Continued) Ball C5 B5 G3 D1 B4 C4 A3 B3 A2 D4 D7 G1 G4 G7 Name Y1B Y0B Vdd Vss GPO0 SMP Vref CHANGE GPO1 Vss Vss Vss Vss Vss Type I I P P O O I OD O P P P P P Comments Y line connection Y line connection Power Supply ground General purpose output 0 Sample output. Reference input State change notification General purpose output 1 Supply ground Supply ground Supply ground Supply ground Supply ground If Unused, Connect To... Leave open Leave open – – Leave open – – – Leave open – – – – – 4 QT5480 9510AS–AT42–10/08 QT5480 1.3 Schematic Typical Circuit Add two 100nF capacitors: one close to pins 5, 17 and 38, and another close to pins 27 and 29. Follow regulator manufacturer's recommended values for input and output bypass capacitors (Creg). Vunreg VREG Figure 1-1. Rx7 Rx6 Rx5 Rx4 VDD Rp QT5480 Rx3 Rx2 Rx1 Rx0 Ry0 Cs0 Ry1 Cs1 Cs2 Ry3 Cs3 Ry4 VDD Cs4 Rp Rp Cs5 Ry5 NOTES: 1) The central pad on the underside of the MLF chip is a Vss pin and should be connected to ground. Do not put any other tracks underneath the body of the chip. 2) It is important to place all Cs, Rs, Rx and Ry components physically near to the chip. Rs5 Rs4 Rs3 Rs2 Rs1 Rs0 3) Leave YnA, YnB unconnected if not used MATRIX Y SCAN IN XT1 16MHz Ry2 MATRIX X DRIVE 5 9510AS–AT42–10/08 Figure 1-2. Typical Circuit – BGA Follow regulator manufacturer's recommended values for input and output bypass capa.


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