SPP3403D

SPP3403D P-Channel Enhancement Mode MOSFET DESCRIPTION The SPP3403D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching , and low in-line power loss are needed in a very small outline surface mount package. APPLICATIONS Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC LCD Display inverter FEATURES -30V/-2.8A,RDS(ON)=100mΩ@VGS=- 10V -30V/-2.5A,RDS(ON)=110mΩ@VGS=-4.5V -30V/-1.5A,RDS(ON)=145mΩ@VGS=-2.5V -30V/-1.0A,RDS(ON)=200mΩ@VGS=-1.8V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOT-23 package design PIN CONFIGURATION ( SOT-23 ) PART MARKING 2012/04/18 Ver.1 Page 1 SPP3403D P-Channel Enhancement Mode MOSFET PIN DESCRIPTION Pin 1 2 3 Symbol G S D Description Gate Source Drain ORDERING INFORMATION Part Number SPP3403DS23RGB Package SOT-23 Part Marking SA3YW ※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 ) ※ SPP3403DS23RGB : Tape Reel ; Pb – Free ; Halogen – Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage Gate –Source Voltage Continuous Drain Current(...