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IR2130J Dataheets PDF



Part Number IR2130J
Manufacturers International Rectifier
Logo International Rectifier
Description 3-PHASE BRIDGE DRIVER
Datasheet IR2130J DatasheetIR2130J Datasheet (PDF)

Data Sheet No. PD60019 Rev.P IR2130/IR2132(J)(S) & (PbF) 3-PHASE BRIDGE DRIVER Features • Floating channel designed for bootstrap operation • • • • • • • • • Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent half-bridge drivers Matched propagation delay for all channels 2.5V logic compatible Outputs out of phase with inputs Cross-c.

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Data Sheet No. PD60019 Rev.P IR2130/IR2132(J)(S) & (PbF) 3-PHASE BRIDGE DRIVER Features • Floating channel designed for bootstrap operation • • • • • • • • • Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent half-bridge drivers Matched propagation delay for all channels 2.5V logic compatible Outputs out of phase with inputs Cross-conduction prevention logic Also available LEAD-FREE Product Summary VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) 600V max. 200 mA / 420 mA 10 - 20V 675 & 425 ns 2.5 µs (IR2130) 0.8 µs (IR2132) Description Packages The IR2130/IR2132(J)(S) is a high voltage, high speed power MOSFET and IGBT driver with three independent high and low side referenced output channels. Proprietary HVIC technology enables ruggedized 28-Lead SOIC monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 2.5V logic. A 28-Lead PDIP ground-referenced operational amplifier provides analog feedback of bridge current via an external current sense resistor. A current trip function which termi44-Lead PLCC w/o 12 Leads nates all six outputs is also derived from this resistor. An open drain FAULT signal indicates if an over-current or undervoltage shutdown has occurred. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use at high frequencies. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 600 volts. Typical Connection (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2130/IR2132(J)(S) & (PbF) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 50 through 53. Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN Definition High Side Floating Supply Voltage High Side Floating Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Logic Ground Low Side Output Voltage Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 & ITRIP) Min. -0.3 VB1,2,3 - 25 VS1,2,3 - 0.3 -0.3 VCC - 25 -0.3 VSS - 0.3 Max. 625 VB1,2,3 + 0.3 VB1,2,3 + 0.3 25 VCC + 0.3 VCC + 0.3 (V SS + 15) or (VCC + 0.3) whichever is lower VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.5 1.6 2.0 83 78 63 150 150 300 Units V VFLT VCAO VCAdVS/dt PD FAULT Output Voltage Operational Amplifier Output Voltage Operational Amplifier Inverting Input Voltage Allowable Offset Supply Voltage Transient Package Power Dissipation @ TA ≤ +25°C RthJA Thermal Resistance, Junction to Ambient (28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC) (28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC) TJ TS TL Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) VSS - 0.3 VSS - 0.3 VSS - 0.3 — — — — — — — — -55 — V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54. Symbol Definition Min. Max. Units VB1,2,3 High Side Floating Supply Voltage VS1,2,3 + 10 VS1,2,3 + 20 VS1,2,3 High Side Floating Offset Voltage Note 1 600 VHO1,2,3 High Side Floating Output Voltage VS1,2,3 VB1,2,3 VCC Low Side and Logic Fixed Supply Voltage 10 20 VSS Logic Ground -5 5 VLO1,2,3 Low Side Output Voltage 0 VCC V VIN Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 & ITRIP) VSS VSS + 5 VFLT VSS VCC FAULT Output Voltage VCAO Operational Amplifier Output Voltage VSS VSS + 5 VCAOperational Amplifier Inverting Input Voltage VSS VSS + 5 TA Ambient Temperature -40 125 °C Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS). (Please refer to the Design Tip DT97-3 for more details). Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode. 2 www.irf.com IR2130/IR2132(J)(S) & (PbF) Dynamic Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15V, VS0,1,2,3 = VSS, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics are defined in Figures 3 through 5. Symbol ton toff tr tf titrip tbl tflt tflt,in tfltclr DT SR+ SR- Definition Turn-On Propagation Delay Turn-Off Propagation Delay Turn-.


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