Document
LF PA K
PSMN010-25YLC
N-channel 25 V 10.6 mΩ logic level MOSFET in LFPAK using NextPower technology
Rev. 2 — 25 October 2011 Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
1.2 Features and benefits
High reliability Power SO8 package, qualified to 175°C Low parasitic inductance and resistance Optimised for 4.5V Gate drive utilising NextPower Superjunction technology Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads
1.3 Applications
DC-to-DC converters Load switching Synchronous buck regulator
1.4 Quick reference data
Table 1. Symbol VDS ID Ptot Tj RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance VGS = 4.5 V; ID = 10 A; Tj = 25 °C; see Figure 12 VGS = 10 V; ID = 10 A; Tj = 25 °C; see Figure 12 VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14; see Figure 15 Conditions 25 °C ≤ Tj ≤ 175 °C Tmb = 25 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; see Figure 2 Min -55 Typ 11.9 9 1.5 5 Max 25 39 30 175 14 10.6 Unit V A W °C mΩ mΩ nC nC
Static characteristics
Dynamic characteristics QGD QG(tot) gate-drain charge total gate charge
NXP Semiconductors
PSMN010-25YLC
N-channel 25 V 10.6 mΩ logic level MOSFET in LFPAK using NextPower technology
2. Pinning information
Table 2. Pin 1 2 3 4 mb Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain
mbb076
Simplified outline
mb
Graphic symbol
D
G S
1 2 3 4
SOT669 (LFPAK; Power-SO8)
3. Ordering information
Table 3. Ordering information Package Name PSMN010-25YLC LFPAK; Power-SO8 Description plastic single-ended surface-mounted package; 4 leads Version SOT669 Type number
PSMN010-25YLC
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 25 October 2011
2 of 15
NXP Semiconductors
PSMN010-25YLC
N-channel 25 V 10.6 mΩ logic level MOSFET in LFPAK using NextPower technology
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj Tsld(M) VESD IS ISM EDS(AL)S Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak soldering temperature electrostatic discharge voltage source current peak source current non-repetitive drain-source avalanche energy MM (JEDEC JESD22-A115) Tmb = 25 °C pulsed; tp ≤ 10 µs; Tmb = 25 °C VGS = 10 V; Tj(init) = 25 °C; ID = 39 A; Vsup ≤ 25 V; unclamped; RGS = 50 Ω; see Figure 3 VGS = 10 V; Tmb = 25 °C; see Figure 1 VGS = 10 V; Tmb = 100 °C; see Figure 1 pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 4 Tmb = 25 °C; see Figure 2 Conditions 25 °C ≤ Tj ≤ 175 °C 25 °C ≤ Tj ≤ 1.