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PMN40LN

NXP

logic level FET

PMN40LN TrenchMOS™ logic level FET M3D302 Rev. 01 — 13 November 2002 Product data 1. Description N-channel logic leve...


NXP

PMN40LN

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Description
PMN40LN TrenchMOS™ logic level FET M3D302 Rev. 01 — 13 November 2002 Product data 1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS™ technology. Product availability: PMN40LN in SOT457 (TSOP6). 2. Features s TrenchMOS™ technology s Logic level compatible s Surface mount package. 3. Applications s Battery management s High speed switch s Low power DC to DC converter. 4. Pinning information Table 1: Pin 1,2,5,6 3 4 Pinning - SOT457 (TSOP6), simplified outline and symbol Description drain (d) gate (g) source (s) g s 6 5 4 d Simplified outline Symbol 1 Top view 2 3 MBK092 MBB076 SOT457 (TSOP6) Philips Semiconductors PMN40LN TrenchMOS™ logic level FET 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions 25 °C ≤ Tj ≤ 150 °C Tsp = 25 °C; VGS = 10 V Tsp = 25 °C VGS = 10 V; ID = 2.5 A; Tj = 25 °C VGS = 4.5 V; ID = 2 A; Tj = 25 °C Typ 32 40 Max 30 5.4 1.75 150 38 45 Unit V A W °C mΩ mΩ drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) c...




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