Document
BUK725R0-40C
N-channel TrenchMOS standard level FET
Rev. 01 — 23 March 2009 Product data sheet
1. Product profile
1.1 General description
Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using advanced TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in high performance automotive applications.
1.2 Features and benefits
AEC Q101 compliant Avalanche robust Suitable for standard level gate drive Suitable for thermally demanding environment up to 175°C rating
1.3 Applications
12V Motor, lamp and solenoid loads High performance automotive power systems High performance Pulse Width Modulation (PWM) applications
1.4 Quick reference data
Table 1. VDS ID Ptot Quick reference Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 3; Tmb = 25 °C; see Figure 2 [1] Min Typ Max 40 75 157 240 Unit V A W mJ drain-source voltage drain current total power dissipation Symbol Parameter
Avalanche ruggedness EDS(AL)S non-repetitive drain-source ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; avalanche energy Tj(init) = 25 °C; unclamped Dynamic characteristics QGD gate-drain charge VGS = 10 V; ID = 25 A; VDS = 32 V; Tj = 25 °C; see Figure 15 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 13 27 nC
Static characteristics RDSon drain-source on-state resistance
[1]
-
4.1
5
mΩ
Current is limited by package.
NXP Semiconductors
BUK725R0-40C
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain
2 1 3 mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT428 (SC-63; DPAK)
3. Ordering information
Table 3. Ordering information Type number Package Name Description BUK725R0-40C SC-63; plastic single-ended surface-mounted package (DPAK); 3 leads (one DPAK lead cropped)
Version SOT428
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
2 of 13
NXP Semiconductors
BUK725R0-40C
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3; Tmb = 100 °C; VGS = 10 V; see Figure 1 IDM Ptot Tstg Tj IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C; tp ≤ 10 µs; pulsed; Tmb = 25 °C [2] Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Tmb = 25 °C; see Figure 2 [1] [1] Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Min -20 -55 -55 Max 40 40 20 75 75 490 157 175 175 75 490 240 Unit V V V A A A W °C °C A A mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; drain-source avalanche Tj(init) = 25 °C; unclamped energy repetitive drain-source avalanche energy
[1] [2] [3] [4] [5]
EDS(AL)R
see Figure 4
[3][4] [5]
-
-
J
Current is limited by package. Continuous current is limited by package. Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Repetitive avalanche rating limited by average junction temperature of 170 °C. Refer to application note AN10273 for further information.
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
3 of 13
NXP Semiconductors
BUK725R0-40C
N-channel TrenchMOS standard level FET
ID (A)
140 120 100
003aac066
120 Pder (%) 80
03na19
80
(1)
60
40
40 20 0 0 50 100 150 Tmb (°C) 200
0 0 50 100 150 Tmb (°C) 200
Fig 1.
Continuous drain current as a function of mounting base temperature
Fig 2.
Normalized total power dissipation as a function of mounting base temperature
003aac305
103 ID (A) 10
2
Limit RDSon = VDS / ID
10 μs
100 μs
10
DC 100 ms
1 ms
1
10 ms
10-1 10-1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
4 of 13
NXP Semiconductors
BUK725R0-40C
N-channel TrenchMOS standard level FET
102 IAL (A) 10
(2) (1)
003aac068
(3)
1
10-1 10-3
10-2
10-1
1 t (ms) 10 AL
Fig 4.
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
5. Thermal characteristics
Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ 0.65 Max 0.95 Unit K/W thermal resistance from see Figure 5 junction to mounting base thermal resistance from vertical in still air; mounted on a printed junction to ambient circuit board; minimum foot-print
Rth(j-a)
-
70
-
K/W
1 Zth(j-mb) (K/W) 10-1 δ = 0.5
0.2 0.1 0.05 0.02
003aac067
10-2
single shot
P
δ=
tp T
tp T
t
1.