Document
LF
BUK9K89-100E
23 April 2013
PA K
56D
Dual N-channel TrenchMOS logic level FET
Product data sheet
1. General description
Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications.
2. Features and benefits
• • • •
Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 °C rating True logic level gate with VGS(th) > 0.5 V @ 175 °C
3. Applications
• • • • •
12 V Automotive systems Motors, lamps and solenoid control Start-stop micro-hybrid applications Transmission control Ultra high performance power switching
4. Quick reference data
Table 1. Symbol VDS ID Ptot RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; Fig. 1 Tmb = 25 °C; Fig. 2 VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 12 Min Typ Max 100 12.5 38 Unit V A W
Static characteristics FET1 and FET2 drain-source on-state resistance gate-drain charge 75.8 89 mΩ
Dynamic characteristics FET1 and FET2 QGD ID = 5 A; VDS = 80 V; VGS = 10 V; Tj = 25 °C; Fig. 14; Fig. 15 4.2 nC
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NXP Semiconductors
BUK9K89-100E
Dual N-channel TrenchMOS logic level FET
5. Pinning information
Table 2. Pin 1 2 3 4 5 6 7 8 Pinning information Symbol Description S1 G1 S2 G2 D2 D2 D1 D1 source1 gate1 source2 gate2 drain2 drain2 drain1 drain1
1 2 3 4
S1 G1 S2 G2
mbk725
Simplified outline
8 7 6 5
Graphic symbol
D1 D1 D2 D2
LFPAK56D (SOT1205)
6. Ordering information
Table 3. Ordering information Package Name BUK9K89-100E LFPAK56D Description Plastic single ended surface mounted package (LFPAK56D); 8 leads Version SOT1205 Type number
7. Marking
Table 4. Marking codes Marking code 98910E Type number BUK9K89-100E
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS Parameter drain-source voltage drain-gate voltage gate-source voltage Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ; Tj ≥ 25 °C; Tj ≤ 175 °C Tj ≤ 175 °C; DC Tj ≤ 175 °C; Pulsed ID drain current Tmb = 25 °C; VGS = 5 V; Fig. 1 Tmb = 100 °C; VGS = 5 V; Fig. 1 IDM
BUK9K89-100E
Min -10
[1][2]
Max 100 100 10 15 12.5 8.9 50
Unit V V V V A A A
2 / 13
-15 -
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
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© NXP B.V. 2013. All rights reserved
Product data sheet
23 April 2013
NXP Semiconductors
BUK9K89-100E
Dual N-channel TrenchMOS logic level FET
Symbol Ptot Tstg Tj Tsld(M) IS ISM EDS(AL)S
Parameter total power dissipation storage temperature junction temperature peak soldering temperature
Conditions Tmb = 25 °C; Fig. 2
Min -55 -55 -
Max 38 175 175 260
Unit W °C °C °C
Source-drain diode FET1 and FET2 source current peak source c.