HCTS11MS

HCTS11MS November 1994 Radiation Hardened Triple 3-Input AND Gate Pinouts 14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C TOP VIEW A1 1 14 VCC 13 C1 12 Y1 11 C3 10 B3 9 A3 8 Y3 Features 3 Micron Radiation Hardened SOS CMOS Total Dose 200K or 1 Mega-RAD (Si) Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55 C to +125 C Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max. - VIH = VCC/2 Min Input Current Levels Ii ≤ 5µA at VOL, VOH o o B1 2 A2 3 B2 4 C2 5 Y2 6 GND 7 Description The Intersil HCTS11MS is a Radiation Hardened Triple 3Input AND Gate. A high on all inputs forces the output to a High state. The HCTS11MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS11MS is supplied in a 14 lead Weld Seal Ceramic flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line Package (D suffix). 14 PIN CERAMIC FLAT PACK MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C TOP VIEW A1 B1 A2 B2 C2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC C1 Y1 C3 B3 A3 Y3 Truth Table INPUTS An L L L L H H H H Bn L L H H L L H H Cn L H L H L H L H OUTPUTS Yn L L L L L Functional Diagram An Bn Yn Cn L L H NOTE: L = Logic Level Low, H = Logic level High CAUTION: These devices are sensitive to electrostatic di...