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HCTS138MS Dataheets PDF



Part Number HCTS138MS
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer
Datasheet HCTS138MS DatasheetHCTS138MS Datasheet (PDF)

HCTS138MS August 1995 Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A0 A1 A2 E1 E2 1 2 3 4 5 6 7 8 16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s.

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HCTS138MS August 1995 Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A0 A1 A2 E1 E2 1 2 3 4 5 6 7 8 16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min • Input Current Levels Ii ≤ 5µA at VOL, VOH E3 Y7 GND 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW A0 A1 A2 E1 E2 E3 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Description The Intersil HCTS138MS is a Radiation Hardened 3-to-8 line Decoder/Demultiplexer. The outputs are active in the low state. Two active low and one active high enables (E1, E2, E3) are provided. If the device is enabled, the binary inputs (A0, A1, A2) determine which one of the eight normally high outputs will go to a low logic level. The HCTS138MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS138MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Ordering Information PART NUMBER HCTS138DMSR HCTS138KMSR HCTS138D/Sample HCTS138K/Sample HCTS138HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die DB NA CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Spec Number File Number 510 518605 2462.2 HCTS138MS Functional Diagram 1 A0 15 Y0 14 2 A1 13 Y2 3 A2 11 Y4 4 E1 5 E2 6 E3 10 Y5 9 Y6 7 Y7 12 Y3 Y1 TRUTH TABLE INPUTS ENABLE E3 X L X H H H H H H H H E2 X X H L L L L L L L L E1 H X X L L L L L L L L A2 X X X L L L L H H H H A1 X X X L L H H L L H H A0 X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H OUTPUTS Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L H = High Level, L = Low Level, X = Don’t Care Spec Number 511 518605 Specifications HCTS138MS Absolute Maximum Ratings Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All .


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