Document
HCTS153MS
September 1995
Radiation Hardened Dual 4-Input Multiplexer
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW
1E 1 S1 2 1I3 3 1I2 4 1I1 5 16 VCC 15 2E 14 S0 13 2I3 12 2I2 11 2I1 10 2I0 9 Y2
Features
• 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Fanout (Over Temperature Range) - Standard Outputs 10 LSTTL Loads • Military Temperature Range -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range 4.5V to 5.5V • LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min • Input Current Levels Ii ≤ 5µA at VOL, VOH
1E S1
1I0 6 Y1 7 GND 8
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC 2E S0 2I3 2I2 2I1 2I0 Y2
Description
The Intersil HCTS153MS is a Radiation Hardened dual 4-to-1 line selector/multiplexer which selects one of four sources for each section by the common select inputs, S0 and S1. When the enable inputs (1E, 2E) are high, the outputs are in the low logic state. The HCTS153MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS153MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
1I3 1I2 1I1 1I0 Y1 GND
Ordering Information
PART NUMBER HCTS153DMSR HCTS153KMSR HCTS153D/Sample HCTS153K/Sample HCTS153HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Spec Number File Number
540
518609 2463.2
HCTS153MS Functional Block Diagram
2E VCC 15 13 2I3 12 2I2 11 2I1 10 2I0 14 S0 2 S1 6 1I0 5 1I1 4 1I2 3 1I3 1 1E
GND
9 2Y
7 1Y
TRUTH TABLE SELECT INPUTS S1 X L L L L H H H H S0 X L L H H L L H H I0 X L H X X X X X X I1 X X X L H X X X X DATA INPUTS I2 X X X X X L H X X I3 X X X X X X X L H ENABLE E H L L L L L L L L OUTPUT Y L L H L H L H L H
Select inputs A and B are common to both sections H = High Level, L = Low Level, X = Immaterial
Spec Number 541
518609
Specifications HCTS153MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA DC Drain Current, Any One Output . . . . . . . . . . . . . . . . . . . . . . .±25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance θJA θJC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . .500ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTER.