A1425A

v3.0 HiRel FPGAs Fe a t ur es Low-Power 0.8µ CMOS Technology 32 0 0D X Fe a t ur es Highly Predictable Performance with 100% Automatic Placement and Routing Device Sizes from 1,200 to 20,000 Gates Up to 6 Fast, Low-Skew Clock Networks Up to 202 User-Programmable I/O Pins More Than 500 Macro Functions Up to 1,276 Dedicated Flip-Flops I/O Drive to 10 mA Devices Available to DSCC SMD CQFP and CPGA Packaging Nonvolatile, User Programmable Logic Fully Tested Prior to Shipment 100% Military Temperature Tested (–55°C to +125°C) QML Certified Devices 100 MHz System Logic Integration Highest Speed FPGA SRAM, up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Low-Power 0.6µ CMOS Technology 12 0 0X L Fe at ure s Pin for Pin Compatible with ACT 2 System Performance to 50 MHz over Military Temperature Low-Power 0.6µ CMOS Technology A CT 2 Fe at ure s Proven Reliability Data Available Successful Military/Avionics Supplier for Over 10 Years A CT 3 Fe at ure s Best-Value, High-Capacity FPGA Family System Performance to 40 MHz over Military Temperature Low-Power 1.0µ CMOS Technology A CT 1 Fe at ure s Highest-Performance, Highest-Capacity FPGA Family System Performance to 60 MHz over Military Temperature Lowest-Cost FPGA Family System Performance to 20 MHz over Military Temperature Low-Power 1.0µ CMOS Technology Pr od uc t F am i l y P r o f i l e (more devices on page 2) Family Device Capacity System ...