HCTS540MS

HCTS540MS September 1995 Radiation Hardened Inverting Octal Buffer/Line Driver, Three-State Pinouts 20 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T20, LEAD FINISH C TOP VIEW OE1 A0 A1 A2 1 2 3 4 5 6 7 8 9 20 VCC 19 OE2 18 Y0 17 Y1 16 Y2 15 Y3 14 Y4 13 Y5 12 Y6 11 Y7 Features 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x Dose Rate Upset >10 10 1012 RAD (Si)/s RAD (Si)/s 20ns Pulse A3 A4 A5 A6 A7 Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) - Bus Driver Outputs 15 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min Input Current Levels Ii ≤ 5µA at VOL, VOH OE1 GND 10 20 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F20, LEAD FINISH C TOP VIEW 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Description The Intersil HCTS540MS is a Radiation Hardened inverting Octal Buffer/Line Driver, with two active-low output enables. The output enable pins (OE1 and OE2) control the threestate outputs. If either enable is high the outputs will be in the high impedance state. For data output both enables (OE1 and OE2) must be low. The HCTS540MS...