HCTS646MS

HCTS646MS August 1995 Radiation Hardened Octal Bus Transceiver/Register, Three-State Pinouts 24 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T24 TOP VIEW CAB 1 SAB 2 DIR 3 A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12 24 VCC 23 CBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7 Features 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Cosmic Ray Upset Rate 2 x 10-9 Errors/Bit Day Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Input Current Levels Ii ≤ 5µA at VOL, VOH Description The Intersil HCTS646MS is a Radiation Hardened ThreeState Octal Bus Tranceiver/Register with Non-Inverting outputs. This device is a bus transceiver with D-type flip-flops which act as internal storage registers. Data on the A bus or the B bus can be clocked into the registers on a High-to-Low transition of either CAB ro CBA clock inputs. Output enable (OE) and Direction (DIR) inputs control the transceiver functions. Data present at the high impedance output can be stored ...