Document
CM119A
High Integration/Low Cost USB Audio Controller
DESCRIPTION
CM119A is a highly integrated single chip USB audio controller specifically for VoIP (Voice over internet protocol) application. All essential analog modules are embedded in CM119A, including dual DAC and earphone driver, ADC, microphone booster, PLL, regulator, and USB transceiver. It’s also support 8GPIO pins and buzzer output pin for VoIP application. In addition, audio adjustment can be easily controlled via specific HID compliant volume control pins. Many features are programmable with jumper pins or external EEPROM. Vender can customize unique USB VID / PID / Product_String / Manufacture_String to EEPROM for VoIP software authentication. Moreover, individual unique phone number for each device is possible via serial number stored in external EEPROM.
FEATURES
Compliant with USB 2.0 Full Speed Operation Compliant with USB Audio Device class specification v1.0 Supports USB Suspend/Resume Mode and remote Wakeup with Volume Control pins Single 12MHz Crystal input with on-chip PLL and embedded USB transceiver Jumper Pin for Speaker Mode (Playback Only) or Headset Mode (Playback + Recording) For Headset Mode, USB audio function topology has 2 Input Terminals, 2 Output Terminals, 1 Mixer Unit, 1 Selector Unit, and 3 Feature Units Jumper Pin for Operation System Mixer Unit Enable/Disable under Headset Mode
BLOCK DIAGRAM
VOLUP VOLDN MUTER LEDO MCU MUTEP LEDR I/F GPIO BUZZ SPDIFO
REGV
PWRSEL MODE PDSW SEL pins
Vref
ROM
3.3V CS SK DW DR USB control processing
+
Vref
Vref Vref
+ +
EEPROM interface
Vref
USBDP USBDM
USB TRX
12. 288/11. 2896 MHz with adjustment
300 x 16 SRAM
0 ~ -45dB 38 steps sync by voltage linear
VPL_ CLK 48 MHz 12 MHz
PLL1
PLL2
+ 22.5~ - 0 dB 16 steps
PLL3
VREF (2.25V) bandgap 4.5 V ( drive typ4mA) TEST
+22. 5 ~ 0 dB 16 steps
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Copyright © C-Media Electronics Inc. Rev. 2.1 ︱ Page 1/33
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12.288/ 11. 2896 MHz
-
XI XO
ISO in processing
High-Pass Filter
16 bit Sigma Delta ADC
+
Vref
+
Vref BOOST +20 dB boost enable
-
-
4 byte FIFO
ISO out processing ( with x2 mod)
16 bit DAC
-
USB interface
16 bit DAC
-
5 - > 3. 3 regulator
USB interrupt processing with 4 byte FIFO
interface logics reset power on reset sync by VPR_ CLK
0 ~ -45dB 38 steps voltage linear
+
LOR
+
LOBS
LOL
MICIN
VREF VBIAS
CM119A
High Integration/Low Cost USB Audio Controller
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TABLE OF CONTENTS Description and Overview ..................................................................... 3 Features .......................................................................................... 3 Pin/Signal Description .......................................................................... 5
3.1 3.2 3.3 Pin Assignment by Pin Number ................................................................................. 5 Pin-Out Diagram .................................................................................................. 5 Pin Signal Description ........................................................................................... 6
4 5 6 7
MCU Interface.................................................................................... 8 Block Diagram ................................................................................... 8 Ordering Information ........................................................................... 9 Function Description...........................................................................10
7.1 USB Interface .................................................................................................... 10
7.1.1 7.1.2 7.1.3 7.1.4 Device Descriptor .............................................................................................. 10 Configuration Descriptor ...................................................................................... 11 Content Format for 93C46 .................................................................................... 12 USB Audio Topology Diagram ................................................................................. 13
7.2 7.3
Jumper Pins and Mode Setting: ............................................................................... 14 HID Feature and Descriptions ................................................................................. 14
7.3.1 7.3.2 HID Descriptor .................................................................................................. 15 Windows Software Architecture for HID .................................................................... 16
7.4
Internal Registers ............................................................................................... 16
7.4.1 7.4.2 7.4.3 Access via HID Class Command:.............................................................................. 17 Access via External Serial Interface by MCU: .............................................................. 20 Indirect Accessed Registers: ...