DatasheetsPDF.com

AS7C32096A Dataheets PDF



Part Number AS7C32096A
Manufacturers Alliance Semiconductor
Logo Alliance Semiconductor
Description 3.3V 256K x 8 CMOS SRAM
Datasheet AS7C32096A DatasheetAS7C32096A Datasheet (PDF)

February 2006 ® AS7C32096A 3.3V 256K × 8 CMOS SRAM Features • Industrial and commercial temperature • Organization: 262,144 words × 8 bits • Center power and ground pins • High speed - 10/12/15/20 ns address access time - 4/5/6/7 ns output enable access time • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages • ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA - 44-pin TSOP 2 • Low power consumption: ACTI.

  AS7C32096A   AS7C32096A



Document
February 2006 ® AS7C32096A 3.3V 256K × 8 CMOS SRAM Features • Industrial and commercial temperature • Organization: 262,144 words × 8 bits • Center power and ground pins • High speed - 10/12/15/20 ns address access time - 4/5/6/7 ns output enable access time • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages • ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA - 44-pin TSOP 2 • Low power consumption: ACTIVE - 650 mW / max @ 10 ns • Low power consumption: STANDBY - 28.8 mW / max CMOS Logic block diagram VCC GND Input buffer A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 Pin arrangements 44-pin TSOP 2 Row decoder 262,144 × 8 Array (2,097,152) Sense amp I/O1 I/O8 Column decoder A10 A11 A12 A13 A14 A15 A16 A17 Control Circuit WE OE CE NC NC A0 A1 A2 A3 A4 CE I/O1 I/O2 VCC GND I/O3 I/O4 WE A5 A6 A7 A8 A9 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A17 A16 A15 A14 OE I/O8 I/O7 GND VCC I/O6 I/O5 A13 A12 A11 A10 NC NC NC NC Selection guide Maximum address access time Maximum output enable access time Maximum operating current Maximum CMOS standby current Industrial Commercial –10 10 4 180 170 8 –12 12 5 160 150 8 –15 15 6 140 130 8 –20 20 7 110 100 8 Unit ns ns mA mA mA 2/17/06, v 1.1 Alliance Semiconductor P. 1 of 9 Copyright © Alliance Semiconductor. All rights reserved. AS7C32096A ® Functional description The AS7C32096A is a high-performance CMOS 2,097,152-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems. When CE is high the device enters standby mode. The device is guaranteed not to exceed 28.8mW power consumption in CMOS standby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O1–I/O8 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE). A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chip drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode. All chip inputs and outputs are TTL-compatible, and operation is from a single 3.3V supply voltage. This device is available as per industry standard 44-pin TSOP 2 package. Absolute maximum ratings Parameter Voltage on VCC relative to GND Voltage on any pin relative to GND Power dissipation Storage temperature (plastic) Temperature with VCC applied DC current into output (low) Symbol Vt1 Vt2 PD Tstg Tbias IOUT Min –0.5 –0.5 – –65 –55 – Max +5.0 VCC +0.5 1.0 +150 +125 20 Unit V V W °C °C mA NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Truth table CE H L L L WE X H H L OE X H L X Data High Z High Z DOUT DIN Mode Standby (ISB, ISB1) Output disable (ICC) Read (ICC) Write (ICC) Key: X = Don’t care, L = Low, H = High 2/17/06, v 1.1 Alliance Semiconductor P. 2 of 9 AS7C32096A ® Recommended operating condition Parameter Supply voltage Input voltage Ambient operating temperature commercial industrial Symbol VCC(10/12/15/20) VIH** VIL* TA TA Min 3.0 2.0 –0.5 0 –40 Nominal 3.3 – – – – Max 3.6 VCC + 0.5 0.8 70 85 Unit V V V °C °C * V min = –1.0V for pulse width less than 5ns. ** IL VIH max = VCC + 2.0V for pulse width less than 5ns. DC operating characteristics (over the operating range)1 Parameter Input leakage current Output leakage current Operating power supply current Symbol |ILI| |ILO| ICC ISB Standby power supply current ISB1 VOL VOH Test conditions VCC = Max, VIN = GND to VCC VCC = Max, CE = VIH VOUT= GND to VCC VCC = Max, CE ≤ VIL f = fMax, IOUT = 0mA Industrial Commercial –10 –12 –15 –20 Min Max Min Max Min Max Min Max Unit – – – – 1 1 180 170 60 – – – – 1 1 160 150 60 – – – – 1 1 140 130 60 – – – – 1 1 110 100 60 µA µA mA mA mA VCC = Max, CE ≥ VIH, f = fMax VCC = Max, CE ≥ VCC – 0.2V, VIN ≤ 0.2V or VIN ≥ VCC – 0.2V, f=0 IOL = 8 mA, VCC = Min IOH = –4 mA, VCC = Min – 8 – 8 – 8 – 8 mA Output volta.


AS7C32098A AS7C32096A R1RW0404D


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)