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HB54R1G9F2U-B75B Dataheets PDF



Part Number HB54R1G9F2U-B75B
Manufacturers Elpida Memory
Logo Elpida Memory
Description 1GB Registered DDR SDRAM DIMM
Datasheet HB54R1G9F2U-B75B DatasheetHB54R1G9F2U-B75B Datasheet (PDF)

DATA SHEET 1GB Registered DDR SDRAM DIMM HB54R1G9F2U-A75B/B75B/10B (128M words × 72 bits, 2 Banks) Description The HB54R1G9F2U is a 128M × 72 × 2 bank Double Data Rate (DDR) SDRAM Module, mounted 36 pieces of 256Mbits DDR SDRAM (HM5425401BTB) sealed in TCP package, 1 piece of PLL clock driver, 2 pieces of register driver and 1 piece of serial EEPROM (2k bits EEPROM) for Presence Detect (PD). Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data .

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DATA SHEET 1GB Registered DDR SDRAM DIMM HB54R1G9F2U-A75B/B75B/10B (128M words × 72 bits, 2 Banks) Description The HB54R1G9F2U is a 128M × 72 × 2 bank Double Data Rate (DDR) SDRAM Module, mounted 36 pieces of 256Mbits DDR SDRAM (HM5425401BTB) sealed in TCP package, 1 piece of PLL clock driver, 2 pieces of register driver and 1 piece of serial EEPROM (2k bits EEPROM) for Presence Detect (PD). Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 2-bit prefetch-pipelined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. An outline of the products is 184-pin socket type package (dual lead out). Therefore, it makes high density mounting possible without surface mount technology. It provides common data inputs and outputs. Decoupling capacitors are mounted beside each TCP on the module board. Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would be electrical defects. Features • 184-pin socket type package (dual lead out)  Outline: 133.35mm (Length) × 30.48mm (Height) × 4.80mm (Thickness)  Lead pitch: 1.27mm • 2.5V power supply (VCC/VCCQ) • SSTL-2 interface for all inputs and outputs • Clock frequency: 143MHz/133MHz/125MHz (max.) • Data inputs and outputs are synchronized with DQS • 4 banks can operate simultaneously and independently (Component) • Burst read/write operation • Programmable burst length: 2, 4, 8  Burst read stop capability • Programmable burst sequence  Sequential  Interleave • Start addressing capability  Even and Odd • Programmable /CAS latency (CL): 3, 3.5 • 8192 refresh cycles: 7.8µs (8192/64ms) • 2 variations of refresh  Auto refresh  Self refresh Document No. E0192H30 (Ver. 3.0) Date Published September 2002 (K) Japan URL: http://www.elpida.com Elpida Memory, Inc. 2001-2002 Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd. HB54R1G9F2U-A75B/B75B/10B Ordering Information Part number HB54R1G9F2U-A75B*1 HB54R1G9F2U-B75B*2 HB54R1G9F2U-10B* Clock frequency MHz (max.) 133 133 100 /CE latency 3.0 3.5 3.0 Package Contact pad 184-pin dual lead out socket Gold type Notes: 1. 143MHz operation at /CAS latency = 3.5. 2. 100MHz operation at /CAS latency = 3.0. 3. 125MHz operation at /CAS latency = 3.5. Pin Configurations Front side 1 pin 52 pin 53 pin 92 pin 93 pin Back side 144 pin 145 pin 184 pin Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin name VREF DQ0 VSS DQ1 DQS0 DQ2 VCC DQ3 NC /RESET VSS DQ8 DQ9 DQS1 VCCQ NC NC VSS DQ10 DQ11 CKE0 VCCQ DQ16 DQ17 DQS2 VSS A9 DQ18 Pin No. 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 Pin name DQS8 A0 CB2 VSS CB3 BA1 DQ32 VCCQ DQ33 DQS4 DQ34 VSS BA0 DQ35 DQ40 VCCQ /WE DQ41 /CAS VSS DQS5 DQ42 DQ43 VCC NC DQ48 DQ49 VSS Pin No. 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 Pin name VSS DQ4 DQ5 VCCQ DM0/DQS9 DQ6 DQ7 VSS NC NC NC VCCQ DQ12 DQ13 DM1/DQS10 VCC DQ14 DQ15 CKE1 VCCQ NC DQ20 A12 VSS DQ21 A11 DM2/DQS11 VCC Pin No. 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 Pin name VSS DM8/DQS17 A10 CB6 VCCQ CB7 VSS DQ36 DQ37 VCC DM4/DQS13 DQ38 DQ39 VSS DQ44 /RAS DQ45 VCCQ /S0 /S1 DM5/DQS14 VSS DQ46 DQ47 NC VCCQ DQ52 DQ53 Data Sheet E0192H30 (Ver. 3.0) 2 HB54R1G9F2U-A75B/B75B/10B Pin No. 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 Pin name A7 VCCQ DQ19 A5 DQ24 VSS DQ25 DQS3 A4 VCC DQ26 DQ27 A2 VSS A1 CB0 CB1 VCC Pin No. 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 Pin name NC NC VCCQ DQS6 DQ50 DQ51 VSS VCCID DQ56 DQ57 VCC DQS7 DQ58 DQ59 VSS NC SDA SCL Pin No. 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 Pin name DQ22 A8 DQ23 VSS A6 DQ28 DQ29 VCCQ DM3/DQS12 A3 DQ30 VSS DQ31 CB4 CB5 VCCQ CK0 /CK0 Pin No. 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 Pin name NC VCC DM6/DQS15 DQ54 DQ55 VCCQ NC DQ60 DQ61 VSS DM7/DQS16 DQ62 DQ63 VCCQ SA0 SA1 SA2 VCCSPD Data Sheet E0192H30 (Ver. 3.0) 3 HB54R1G9F2U-A75B/B75B/10B Pin Description Pin name A0 to A12 BA0, BA1 DQ0 to DQ63 CB0 to CB7 /RAS /CAS /WE /S0, /S1 CKE0, CKE1 CK0 /CK0 DQS0 to DQS8 DM0 to DM8/DQS9 to DQS17 SCL SDA SA0 to SA2 VCC VCCQ VCCSPD VREF VSS VCCID /RESET NC Function Address input Row address Column address A0 to A12 A0 to A9, A11 Bank select address Data input/output Check bit (Data input/output) Row address strobe command Column address strobe command Write enable Chip select Clock enable Clock input Differential clock input Input and output data strobe Input and output data strobe Clock input for serial PD Data input/output for serial PD Serial address input Power for internal circuit Power f.


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