Document
Rev. 1.2, Jul. 2011 K4T1G044QF K4T1G084QF K4T1G164QF
1Gb F-die DDR2 SDRAM
60FBGA/84FBGA with Lead-Free & Halogen-Free (RoHS compliant)
datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of Samsung Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. For updates or additional information about Samsung products, contact your nearest Samsung office. All brand names, trademarks and registered trademarks belong to their respective owners. ⓒ 2011 Samsung Electronics Co., Ltd. All rights reserved.
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K4T1G044QF K4T1G084QF K4T1G164QF
datasheet
Revision History
Revision No. 1.0 1.1 1.11 1.2
History - Final Spec. Release - Changed IDD current spec.(IDD3P-S/IDD3N/IDD4W) - Corrected typo VID(AC) Max. on page 14. - Corrected typo.
Draft Date May. 2010 Aug. 2010 Sep. 2010 Jul. 2011
Rev. 1.2
DDR2 SDRAM
Remark -
Editor S.H.Kim S.H.Kim S.H.Kim J.Y.Lee
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K4T1G044QF K4T1G084QF K4T1G164QF
datasheet
Rev. 1.2
DDR2 SDRAM
Table Of Contents
1Gb F-die DDR2 SDRAM
1. Ordering Information ..................................................................................................................................................... 4
2. Key Features................................................................................................................................................................. 4
3. Package pinout/Mechanical Dimension & Addressing.................................................................................................. 5 3.1 x4 Package Pinout (Top view) : 60ball FBGA Package .......................................................................................... 5 3.2 x8 Package Pinout (Top view) : 60ball FBGA Package .......................................................................................... 6 3.3 x16 Package Pinout (Top view) : 84ball FBGA Package ........................................................................................ 7 3.4 FBGA Package Dimension (x4/x8) .......................................................................................................................... 8 3.5 FBGA Package Dimension (x16)............................................................................................................................. 9
4. Input/Output Functional Description.............................................................................................................................. 10
5. DDR2 SDRAM Addressing ........................................................................................................................................... 11
6. Absolute Maximum Ratings .......................................................................................................................................... 12
7. AC & DC Operating Conditions..................................................................................................................................... 12 7.1 Recommended DC operating Conditions (SSTL_1.8)............................................................................................. 12 7.2 Operating Temperature Condition ........................................................................................................................... 13 7.3 Input DC Logic Level ............................................................................................................................................... 13 7.4 Input AC Logic Level ............................................................................................................................................... 13 7.5 AC Input Test Conditions......................................................................................................................................... 13 7.6 Differential input AC logic Level............................................................................................................................... 14 7.7 Differential AC output parameters ........................................................................................................................... 14
8. ODT DC electrical characteristics .............................................................................