P3041

Freescale Semiconductor Data Sheet: Technical Data Document Number: P3041EC Rev. 2, 02/2013 P3041 P3041 QorIQ Integrated Processor Hardware Specifications The P3041 QorIQ integrated processor utilizes four processor cores built on Power Architecture® technology. The cores include high-performance data path acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, wireless infrastructure, and aerospace applications. This chip can be used for combined control, data path, and application layer processing in routers, switches, base station controllers, and general-purpose embedded computing. Its high level of integration offers significant performance benefits compared to multiple discrete devices while also greatly simplifying board design. The chip includes the following functions and features: Four e500mc Power Architecture cores, each with a backside 128 KB L2 cache with ECC – Three levels of instructions: User, supervisor, and hypervisor – Independent boot and reset – Secure boot capability CoreNet fabric supporting coherent and non-coherent transactions amongst CoreNet end-points CoreNet platform cache with ECC CoreNet bridges between the CoreNet fabric the I/Os, datapath accelerators, and high and low speed peripheral interfaces One 10-Gigabit Ethernet (XAUI) controller Five 1-Gigabit Ethernet controllers – SGMII interfaces — 2.5 Gbps SGMII interfaces – RGMII interfaces One 64-bit DDR3 SDRAM memory controller wit...