TwinDie 1.35V DDR3L SDRAM
Preliminary‡
8Gb: x4, x8 TwinDie DDR3L SDRAM Description
TwinDie™ 1.35V DDR3L SDRAM
MT41K2G4 – 128 Meg x 4 x 8 Banks x...
Description
Preliminary‡
8Gb: x4, x8 TwinDie DDR3L SDRAM Description
TwinDie™ 1.35V DDR3L SDRAM
MT41K2G4 – 128 Meg x 4 x 8 Banks x 2 Ranks MT41K1G8 – 64 Meg x 8 x 8 Banks x 2 Ranks Description
The 8Gb (TwinDie™) DDR3L SDRAM (1.35V) uses Micron’s 4Gb DDR3L SDRAM die (essentially two ranks of the 4Gb DDR3L SDRAM). Refer to Micron’s 4Gb DDR3 SDRAM data sheet for the specifications not included in this document. Specifications for base part number MT41K1G4 correlate to TwinDie manufacturing part number MT41K2G4; specifications for base part number MT41K512M8 correlate to TwinDie manufacturing part number MT41K1G8.
Options
Configuration – 128 Meg x 4 x 8 banks x 2 ranks – 64 Meg x 8 x 8 banks x 2 ranks FBGA package (Pb-free) – 78-ball FBGA (10.5mm x 12mm x 1.2mm) Die Rev :D – 78-ball FBGA (9.5mm x 11.5mm x 1.2mm) Die Rev :E Timing – cycle time1 – 1.071ns @ CL = 13 (DDR3L-1866) – 1.25ns @ CL = 11 (DDR3L-1600) – 1.5ns @ CL = 9 (DDR3L-1333) – 1.87ns @ CL = 7 (DDR3L-1066) Self refresh – Standard Operating temperature – Commercial (0°C ≤ T C ≤ 95°C) – Industrial (-40°C ≤ T C ≤ 95°C) Rev. E Revision
Note: 1. CL = CAS (READ) latency.
Marking
2G4 1G8 THE TRF
Features
Uses 4Gb Micron die Two ranks (includes dual CS#, ODT, CKE, and ZQ balls) Each rank has eight internal banks for concurrent operation VDD = V DDQ = 1.35V (1.283–1.45V); backward compatible to V DD = V DDQ = 1.5V ±0.075V 1.35V center-terminated push/pull I/O JEDEC-standard ball-out Low-profile package TC o...
Similar Datasheet