M2Y1G64TU88G7B

M2Y1G64TU88G7B / M2Y2G64TU8HG5B 1GB: 128M x 64 / 2GB: 256M x 64 Unbuffered DDR2 SDRAM DIMM Preliminary 240pin Unbuffered DDR2 SDRAM MODULE Based on 128Mx8 DDR2 SDRAM G-die Features Performance: PC2-5300 Speed Sort DIMM  Latency t CK Clock Cycle f DQ DQ Burst Frequency * PC2-6400 -AC 5 400 2.5 800 PC2-8500 -BD 6 533 1.875 1066 MHz ns Mbps Programmable Operation: - Device  Latency: 3, 4, 5, 6 - Burst Length: 4, 8 Auto Refresh (CBR) and Self Refresh Modes Automatic and controlled precharge commands 14/10/1 Addressing (row/column/rank) – 1GB 14/10/2 Addressing (row/column/rank) – 2GB Serial Presence Detect On Die Termination (ODT) OCD impedance adjustment. Gold contacts SDRAMs in 60-ball BGA Package RoHs Compliance. Unit -3C 5 333 3 667 f CK Clock Frequency JEDEC Standard 240-pin Dual In-Line Memory Module 128Mx64 and 256Mx64 DDR2 Unbuffered DIMM based on Elixir 128Mx8 DDR2 SDRAM G-die component Double Data Rate architecture; two data transfer per clock cycle Differential bi-directional data strobe (DQS & ) DQS is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs (CK & ) Intended for 333MHz/400MHz applications Inputs and outputs are SSTL-18 compatible VDD = VDDQ = 1.8V ± 0.1V 7.8 μs Max. Average Periodic Refresh Interval Description M2Y1G64TU88G7B and M2Y2G64TU8HG5B are 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Unbuffered Dual In-Line Memory Module (UDIMM), or...