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HCC40193B Dataheets PDF



Part Number HCC40193B
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE
Datasheet HCC40193B DatasheetHCC40193B Datasheet (PDF)

HCC/HCF40192B HCC/HCF40193B PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B – BCD TYPE 40193B – BINARY TYPE . . . . . . . . . INDIVIDUAL CLOCK LINES FOR COUNTING UP OR COUNTING DOWN SYNCHRONOUS HIGH-SPEED CARRY AND BORROW PROPAGATION DELAYS FOR CASCADING ASYNCHRONOUS RESET AND PRESET CAPABILITY MEDIUM-SPEED OPERATION - fCL = 8MHz (typ.) @ 10V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100.

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HCC/HCF40192B HCC/HCF40193B PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B – BCD TYPE 40193B – BINARY TYPE . . . . . . . . . INDIVIDUAL CLOCK LINES FOR COUNTING UP OR COUNTING DOWN SYNCHRONOUS HIGH-SPEED CARRY AND BORROW PROPAGATION DELAYS FOR CASCADING ASYNCHRONOUS RESET AND PRESET CAPABILITY MEDIUM-SPEED OPERATION - fCL = 8MHz (typ.) @ 10V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N° 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Frit Seal Package) M1 (Chip Carrier) C1 (Plastic Chip Carrier) ORDER CODES : HCC401XXBF HCF401XXBM1 HCF401XXBEY HCF401XXBC1 DESCRIPTION The HCC40192B, HCC40193B, (extended temperature range) and the HCF40192B, HCF40193B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and platic micro package. The HCC/HCF40192B Presettable BCD Up/Down Counter and the HCC/HCF40193B Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated ”D” type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a PRESET ENABLE control, individual CLOCK UP and CLOCK DOWN signals and a master RESET. Four buffered Q signal outputs as well as CARRY and BORROW outputs for multiple-stage counting schemes are provided. The counter is cleared so that all outputs are in a low state by a high on the RESET line. A RESET is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when thePRESET ENABLE control is low. The counter counts up one count on the positive clock edge of the CLOCK UP signal provided the CLOCK DOWN line is high. The counter counts down one count on the positive clock edge of the CLOCK DOWN signal provided the CLOCK UP line June 1989 PIN CONNECTIONS 1/15 HCC/HCF40192B/193B is high. The CARRY and BORROW signals are high when the counter is counting up or down. The CARRY signal goes low one-half clock cycle after the counter reaches its maximum count in the countup mode. The BORROW signal goes low one-half clock cycle after the counter reaches its minimum FUNCTIONAL DIAGRAM count in the count-down mode. Cascading of multiple packages is easily accomplished without the need for additional external circuitry by tying the BORROW and CARRY outputs to the CLOCK DOWN and CLOCK UP inputs, respectively, of the succeeding package. ABSOLUTE MAXIMUM RATINGS Symbol V DD* Vi II Pt ot Parameter Supply Voltage : HC C Types H C F Types Input Voltage DC Input Current (any one input) Total Power Dissipation (per package) Dissipation per Output Transistor for T o p = Full Package-temperature Range Operating Temperature : HCC Types H CF Types Storage Temperature Value – 0.5 to + 20 – 0.5 to + 18 – 0.5 to V DD + 0.5 ± 10 200 100 – 55 to + 125 – 40 to + 85 – 65 to + 150 Unit V V V mA mW mW °C °C °C Top Tstg Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltages are with respect to VSS (GND). RECOMMENDED OPERATING CONDITIONS Symbol V DD VI Top Parameter Supply Voltage : H CC Types H C F Types Input Voltage Operating Temperature : HCC Types H CF Types Value 3 to 18 3 to 15 0 to V DD – 55 to + 125 – 40 to + 85 Unit V V V °C °C 2/15 HCC/HCF40192B/193B LOGIC DIAGRAMS 40192B (BCD). 40193B (Binary). 3/15 HCC/HCF40192B/193B TIMING DIAGRAMS 40192B (BCD). 40193B (Binary). 4/15 HCC/HCF40192B/193B Internal Logic of Flip-flop. TRUTH TABLE Clock Up – –/ –\ – 1 1 X X 1 = High Level 0 = Low Level Clock Down 1 1 –/ –\ X X X = Don’t Care. Preset Enable 1 1 Reset 0 0 0 0 0 1 Action Count Up No Count Count Down No Count Preset Reset – – 1 1 0 X 5/15 HCC/HCF40192B/193B STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditions Symbol Parameter VI (V) 0/ 5 HCC Types 0/15 0/20 0/ 5 HCF 0/10 Types 0/15 V OH Output High Voltage 0/ 5 0/10 0/15 V OL Output Low Voltage 5/0 10/0 15/0 V IH Input High Voltage 0.5/4.5 1/9 4.5/0.5 9/1 0/ 5 HCC Types 0/10 0/15 0/ 5 0/ 5 HCF Types 0/10 0/15 I OL Output Sink Current 0/ 5 HCC 0/10 Types 0/15 0/ 5 HCF 0/10 Types 0/15 I IH , I IL Input Leakage Current HCC 0/18 Types HCF 0/15 Types Any Input 0/ 5 2.5 4.6 9.5 13.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 0/10 VO (V) Value Unit |I O | V D D T L o w* 25 ° C T Hi g h * ( µA) (V) Min. Max. Min. Typ. Max. Min. Max. 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10.


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