Document
STC12C5620AD series MCU STC12LE5620AD series MCU
Data Sheet
STC MCU Limited
STC MCU Limited.
Update date: 2011-7-15
CONTENTS
Chapter 1. Introduction.................................................................7
1.1 Features................................................................................................... 7 1.2 Block diagram......................................................................................... 8 1.3 Pin Configurations ................................................................................. 9 1.4 STC12C5620AD series Selection Table................................................11 1.5 STC12C5620AD series Minimum Application System....................... 12 1.6 STC12C5620AD series MCU Typical Application Circuit for ISP...... 13
1.6.1 STC12C5620AD series MCU (28 pin) Typical Application Circuit for ISP...... 13 1.6.2 STC12C5620AD series MCU (20 pin) Typical Application Circuit for ISP...... 15 1.6.3 STC12C5620AD series MCU (32 pin) Typical Application Circuit for ISP...... 17
ited1.7 Pin Descriptions.................................................................................... 18
1.8 Package Dimension Drawings.............................................................. 20
Lim1.9 STC12C5620AD series MCU naming rules......................................... 26
1.10 Global Unique Identification Number (ID)........................................ 27
CUChapter 2. Clock, Power Management and Reset.....................30 M2.1 Clock..................................................................................................... 30
2.1.1 On-Chip R/C Clock and External Crystal/Clcok are Optional in STC-ISP.exe .. 30
STC2.1.2 Divider for System Clock .................................................................................... 31
2.1.3 How to Know Internal RC Oscillator frequency(Internal clock frequency) ....... 32 2.1.4 Programmable Clock Output................................................................................ 35
2.1.4.1 Timer 0 Programmable Clock-out on P1.0.........................................................................36 2.1.4.2 Timer 1 Programmable Clock-out on P1.1.........................................................................37
2.2 Power Management Modes................................................................... 38
2.2.1 Slow Down Mode................................................................................................. 39 2.2.2 Idle Mode............................................................................................................. 40 2.2.3 Stop / Power Down (PD) Mode and Demo Program (C and ASM).................... 41
2.3 RESET Sources..................................................................................... 47
2.3.1 RESET Pin........................................................................................................... 47 2.3.2 Software RESET.................................................................................................. 47 2.3.3 Power-On Reset (POR)........................................................................................ 48 2.3.4 MAX810 power-on-Reset delay.......................................................................... 48 2.3.5 Internal Low Voltage Detection Reset.................................................................. 49
2.3.6 Watch-Dog-Timer................................................................................................. 52 2.3.7 Warm Boot and Cold Boot Reset......................................................................... 56
Chapter 3. Memory Organization...............................................57
3.1 Program Memory.................................................................................. 57 3.2 Data Memory(SRAM).......................................................................... 58
3.2.1 On-chip Scratch-Pad RAM.................................................................................. 58 3.2.2 Auxiliary RAM..................................................................................................... 61
3.3 Special Function Registers.................................................................... 65
3.3.1 Special Function Registers Address Map............................................................. 65 3.3.2 Special Function Registers Bits Description........................................................ 66
Chapter 4. Configurable I/O Ports of STC12C5620AD series 71
ited4.1 I/O Ports Configurations....................................................................... 71 Lim4.2 I/O ports Modes.................................................................................... 74
4.2.1 Quasi-bidirectional I/O......................................................................................... 74 4.2.2 Push-pull Output.................................................................................................. 75
CU4.2.3 I.