PNX7100

INTEGRATED CIRCUITS DATA SHEET PNX7100 MPEG AVG CODEC Objective specification File under Integrated Circuits, IC02 2002 Feb 28 Philips Semiconductors MPEG AVG CODEC Objective specification PNX7100 FEATURES Interfaces 32-bit 133 MHz SDRAM interface supports up to two 256 Mbit devices including one SyncFlash memory PCI-XIO extension bus interface supports PCI-bus (rev. 2.2) and 8-bit NAND or NOR flash 8 or 16-bit IDE interface ATA-4 (master) I2S-bus interface to basic engine (slave) Byte parallel MPEG TS output to IEEE 1394 link interface Byte parallel MPEG TS or DV input from IEEE 1394 link interface Four DMA UARTs Two I2C-bus master or slave transceivers 32 GPIO pins RGB (YUV), YC and CVBS output (10-bit DAC) with Macrovision copy protection SMPTE 293M progressive digital video output interface ITU-R BT.656 digital video output interface ITU-R BT.656 digital video input interface Four serial two-channel audio outputs for multichannel and headphone (I2S-bus format) Serial IEC 60958 or IEC 61937 audio output (SPDIF format) Serial two-channel audio input (I2S-bus format) Two serial IEC 60958 or IEC 61937 audio inputs (SPDIF format). Control High performance 133 MHz PR3940 RISC (32-bit MIPS-II and MIPS16 CPU) with 16 kbyte instruction cache, 8 kbyte data cache and 4 word write buffer Low-power mode including wake-up on interrupt Boot from NAND, NOR or SyncFlash memory or I2C-bus Two 24-bit timers 24-bit watchdog timers. Hardware M...