Document
UBA2080; UBA2080A; UBA2081
Half-bridge driver IC
Rev. 3 — 18 June 2012
Product data sheet
1. General description
The UBA2080(A) and UBA2081 are high voltage monolithic integrated circuits made using the latch-up free Silicon-On-Insulator (SOI) process. The circuit is designed for driving MOSFETs in a half-bridge configuration.
2. Features and benefits
Latch-up free and robust half bridge driver Output driver capability: IO(sink) = 400 mA and IO(source) = 200 mA Maximum frequency 800 kHz UBA2080:
Outputs in phase with HIN and LIN inputs Overlap protection UBA2081: Outputs in phase with CLK input Adjustable dead-time Low active shutdown input
3. Applications
Driver (via external MOSFETs) for any kind of load in a half-bridge configuration UBA2080A:
Selectable between UBA2080 and UBA2081 functionality Thermally enhanced package for high frequency operation.
4. Ordering information
Table 1. Ordering information
Type number Package
Name Description
UBA2080P
DIP8
plastic dual in-line package; 8 leads
UBA2081P
UBA2080T
SO8
plastic small outline package; 8 leads
UBA2081T
UBA2080AT SO14 plastic small outline package; 14 leads
Version SOT97-1
SOT96-1
SOT108-1
NXP Semiconductors
5. Block diagram
UBA2080; UBA2080A; UBA2081
Half-bridge driver IC
FS
VDD
ULVO
ULVO
R1 R2 S
HS DRIVER
GH
HIN
LOGIC
LEVEL SHIFTER
SH
LIN
LS DRIVER
GL
OVERLAP PROTECTION
GND
SEL
Fig 1. Block diagram (UBA2080 and UBA2080A with select = GND)
aaa-001102
FS
VDD
ULVO
ULVO
R1 R2 S
HS DRIVER
GH
CLK
LOGIC
LEVEL SHIFTER
SH
SD Vref
NON-OVERLAP
LS DRIVER
GL
GND
SEL
aaa-001107
Fig 2. Block diagram (UBA2080A and UBA2081 with select = VDD)
Refer to Figure 7 and Figure 8 for detailed information on the required application components.
UBA2080_UBA2081
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 June 2012
© NXP B.V. 2012. All rights reserved.
2 of 15
NXP Semiconductors
6. Pinning information
6.1 Pinning
UBA2080; UBA2080A; UBA2081
Half-bridge driver IC
VDD 1 GND 2
LIN 3 HIN 4
8 GL
UBA2080
7 SH 6 GH
5 FS
aaa-001121
Fig 3.
UBA2080: Pin configuration DIP8 and SO8 package
GND 1 GND 2 SD/LIN 3 GND 4 CLK/HIN 5
FS 6 GH 7
14 SEL 13 GND 12 VDD UBA2080A 11 GL 10 GND 9 GND 8 SH
aaa-001134
Fig 4.
UBA2080A: Pin configuration SO14 package
VDD 1 GND 2
SD 3 CLK 4
8 GL
UBA2081
7 SH 6 GH
5 FS
aaa-001126
Fig 5. UBA2081: Pin configuration DIP8 and SO8 package
6.2 Pin description
Table 2. Symbol
VDD GND LIN SD
HIN CLK FS GH SH GL
Pin description UBA2080/UBA2081 DIP8 and SO8
Pin Description
UBA2080 UBA2081 (DIP8/SO8) (DIP8/SO8)
1 IC supply
2 IC ground and low-side driver return
3-
low-side driver logic input
- 3 low active analog shutdown input and non-overlap time setting
4-
high-side driver logic input
- 4 clock logic input
5 floating supply voltage
6 high-side MOSFET gate
7 high-side MOSFET source
8 low-side MOSFET gate
Table 3. Symbol GND SD/LIN
CLK/HIN FS SH
Pin description UBA2080AT (SO14) Pin Description 1, 2, 4, 9, 10, 13 IC ground and low side driver return 3 low-side driver logic input or low active shutdown and non-overlap time setting 5 high-side driver logic input or clock logic input 6 floating supply voltage 8 high-side MOSFET source
UBA2080_UBA2081
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 June 2012
© NXP B.V. 2012. All rights reserved.
3 of 15
NXP Semiconductors
UBA2080; UBA2080A; UBA2081
Half-bridge driver IC
Table 3. Symbol GH GL VDD SEL
Pin description UBA2080AT (SO14) …continued Pin Description 7 high-side MOSFET gate 11 low-side MOSFET gate 12 IC supply 14 select UBA2080 or UBA2081 functionality; only connect to GND or VDD
7. Functional description
7.1 Start-up state
The IC enters the start-up state when the supply voltage on pin VDD increases. In the start-up state, the high-side power transistor is non-conducting and the low-side power transistor is switched on. The internal circuit is reset and the capacitor on the bootstrap pin FS is charged. The start-up state is defined until the value of VDD = the VDD(start) value. After which the IC switches to the oscillation state.
The circuit enters the start-up state again when the voltage on pin VDD < VDD(stop).
7.2 UBA2080 oscillation state
In the oscillation state, the output voltage of the GL and GH drivers depend on the logical signals HIN and LIN (see Table 4).
To prevent cross conduction in the half-bridge MOSFETs, the combination HIN = LIN = 1 is not allowed. Both GL and GH are LOW under this condition.
Table 4. UBA2080 Logic table
State
HIN
Start-up
-
Oscillation
0
Oscillation
0
Oscillation
1
Oscillation
1
LIN GH - LOW 0 LOW 1 LOW 0 HIGH 1 LOW
GL HIGH LOW HIGH LOW LOW
7.3 UBA2081 oscillation state
In the oscillation state, the output voltage of the GL and GH drivers depend on the logical signals CLK and SD (see Table 5).
Table 5. .