GTLP2T152

GTLP2T152 2-Bit LVTTL/GTLP Transceiver June 2001 Revised February 2002 GTLP2T152 2-Bit LVTTL/GTLP Transceiver General Description The GTLP2T152 is a 2-bit transceiver that provides LVTTLto-GTLP signal level translation. Data directional control is handled with a transmit/receive pin. High-speed backplane operation is a direct result of GTLP’s reduced output swing (<1V), reduced input threshold levels and output edge rate control. The edge rate control minimizes bus-settling time. GTLP is a Fairchild Semiconductor derivative of the Gunning Transistor logic (GTL) JEDEC standard JESD8-3. Fairchild’s GTLP has internal edge-rate control and is process, voltage and temperature compensated. GTLP’s I/O structure is similar to GTL and BTL but offers different output levels and receiver threshold. Typical GTLP output voltage levels are: VOL = 0.5V, VOH = 1.5V, and VREF = 1V. Features s Bidirectional interface between GTLP and LVTTL logic levels s Designed with edge rate control circuitry to reduce output noise on the GTLP port s VREF pin provides external supply reference voltage for receiver threshold adjustibility s Special PVT compensation circuitry to provide consistent performance over variations of process, supply voltage and temperature s TTL compatible driver and control inputs s Designed using Fairchild advanced BiCMOS technology s Bushold data inputs on A port to eliminate the need for external pull-up resistors for unused inputs s Power up/down and power off high impedanc...