XC7VX1140T XT FPGAs Datasheet

XC7VX1140T Datasheet, PDF, Equivalent


Part Number

XC7VX1140T

Description

Virtex-7 T and XT FPGAs

Manufacture

Xilinx

Total Page 30 Pages
Datasheet
Download XC7VX1140T Datasheet


XC7VX1140T
DS183 (v1.21) July 1, 2014
Virtex-7 T and XT FPGAs Data Sheet:
DC and AC Switching Characteristics
Product Specification
Introduction
Virtex®-7 T and XT FPGAs are available in -3, -2, -1, and
-2L speed grades, with -3 having the highest performance.
The -2L devices operate at VCCINT = 1.0V and are screened
for lower maximum static power. The speed specification of
a -2L device is the same as the -2 speed grade. The -2G
speed grade is available in devices utilizing Stacked Silicon
Interconnect (SSI) technology. The -2G speed grade
supports 12.5 Gb/s GTX or 13.1 Gb/s GTH transceivers as
well as the standard -2 speed grade specifications.
Virtex-7 T and XT FPGA DC and AC characteristics are
specified in commercial, extended, industrial, and military
temperature ranges. Except for the operating temperature
range or unless otherwise noted, all the DC and AC
electrical parameters are the same for a particular speed
grade (that is, the timing characteristics of a -1M speed
grade military device are the same as for a -1C speed grade
commercial device). However, only selected speed grades
and/or devices are available in each temperature range.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The
parameters included are common to popular designs and
typical applications.
Available device and package combinations can be found in:
7 Series FPGAs Overview (DS180)
Defense-Grade 7 Series FPGAs Overview (DS185)
This Virtex-7 T and XT FPGA data sheet, part of an overall
set of documentation on the 7 series FPGAs, is available on
the Xilinx website at www.xilinx.com/7.
DC Characteristics
Table 1: Absolute Maximum Ratings(1)
Symbol
Description
FPGA Logic
VCCINT
VCCAUX
VCCBRAM
VCCO
Internal supply voltage
Auxiliary supply voltage
Supply voltage for the block RAM memories
Output drivers supply voltage for 3.3V HR I/O banks
Output drivers supply voltage for 1.8V HP I/O banks
VCCAUX_IO
VREF
Auxiliary supply voltage
Input reference voltage
I/O input voltage for 3.3V HR I/O banks
VIN(2)(3)(4)
I/O input voltage for 1.8V HP I/O banks
I/O input voltage (when VCCO = 3.3V) for VREF and differential I/O standards except
TMDS_33(5)
VCCBATT
Key memory battery backup supply
GTX and GTH Transceivers
VMGTAVCC
VMGTAVTT
VMGTVCCAUX
VMGTREFCLK
Analog supply voltage for the GTX/GTH transmitter and receiver circuits
Analog supply voltage for the GTX/GTH transmitter and receiver termination circuits
Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX/GTH transceivers
GTX/GTH transceiver reference clock absolute input voltage
Min Max Units
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.40
–0.55
–0.40
1.1
2.0
1.1
3.6
2.0
2.06
2.0
VCCO + 0.55
VCCO + 0.55
2.625
V
V
V
V
V
V
V
V
V
V
–0.5 2.0
V
–0.5 1.1
–0.5 1.32
–0.5 1.935
–0.5 1.32
V
V
V
V
© 2011–2014 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Kintex, Artix, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective owners.
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
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XC7VX1140T
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
Table 1: Absolute Maximum Ratings(1) (Cont’d)
Symbol
Description
Min Max Units
VMGTAVTTRCAL
Analog supply voltage for the resistor calibration circuit of the GTX/GTH transceiver
column
–0.5
1.32
V
VIN Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage
IDCIN-FLOAT
DC input current for receiver input pins DC coupled RX termination = floating
IDCIN-MGTAVTT DC input current for receiver input pins DC coupled RX termination = VMGTAVTT
IDCIN-GND
DC input current for receiver input pins DC coupled RX termination = GND
IDCOUT-FLOAT DC output current for transmitter pins DC coupled RX termination = floating
IDCOUT-MGTAVTT DC output current for transmitter pins DC coupled RX termination = VMGTAVTT
XADC
–0.5 1.26
V
– 14 mA
– 12 mA
– 6.5 mA
– 14 mA
– 12 mA
VCCADC
VREFP
Temperature
XADC supply relative to GNDADC
XADC reference input relative to GNDADC
–0.5 2.0
–0.5 2.0
V
V
TSTG
TSOL
Storage temperature (ambient)
Maximum soldering temperature for Pb/Sn component bodies(6)
Maximum soldering temperature for Pb-free component bodies(6)
–65 150 °C
+220
°C
+260
°C
Tj Maximum junction temperature(6)
+125
°C
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
2. The lower absolute voltage specification always applies.
3. For I/O operation, refer to the 7 Series FPGAs SelectIO Resources User Guide (UG471).
4. The maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table 5.
5. See Table 10 for TMDS_33 specifications.
6. For soldering guidelines and thermal considerations, see the 7 Series FPGA Packaging and Pinout Specification (UG475).
Table 2: Recommended Operating Conditions(1)(2)
Symbol
Description
FPGA Logic
VCCINT(3)
Internal supply voltage
Internal supply voltage for -1C devices with voltage identification (VID) bit
programmed to run at 0.9V typical(4).
VCCBRAM(3)
Block RAM supply voltage
Block RAM supply voltage for -1C devices with voltage identification (VID)
bit programmed to run at 0.9V typical(4).
VCCAUX
VCCO(5)(6)
Auxiliary supply voltage
Supply voltage for 3.3V HR I/O banks
Supply voltage for 1.8V HP I/O banks
VCCAUX_IO(7)
Auxiliary supply voltage when set to 1.8V
Auxiliary supply voltage when set to 2.0V
VIN(8)
I/O input voltage
I/O input voltage (when VCCO = 3.3V) for VREF and differential I/O
standards except TMDS_33(9)
IIN(10)
Maximum current through any pin in a powered or unpowered bank when
forward biasing the clamp diode.
Min
0.97
0.87
0.97
0.87
1.71
1.14
1.14
1.71
1.94
–0.20
–0.20
Typ Max Units
1.00 1.03 V
0.90 0.93 V
1.00 1.03 V
0.90 1.03 V
1.80
1.80
2.00
1.89
3.465
1.89
1.89
2.06
VCCO + 0.2
2.625
V
V
V
V
V
V
V
– 10 mA
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
Send Feedback
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Features DS183 (v1.21) July 1, 2014 Virtex-7 T a nd XT FPGAs Data Sheet: DC and AC Switc hing Characteristics Product Specificat ion Introduction Virtex®-7 T and XT F PGAs are available in -3, -2, -1, and - 2L speed grades, with -3 having the hig hest performance. The -2L devices opera te at VCCINT = 1.0V and are screened fo r lower maximum static power. The speed specification of a -2L device is the s ame as the -2 speed grade. The -2G spee d grade is available in devices utilizi ng Stacked Silicon Interconnect (SSI) t echnology. The -2G speed grade supports 12.5 Gb/s GTX or 13.1 Gb/s GTH transce ivers as well as the standard -2 speed grade specifications. Virtex-7 T and XT FPGA DC and AC characteristics are spe cified in commercial, extended, industr ial, and military temperature ranges. E xcept for the operating temperature ran ge or unless otherwise noted, all the D C and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1M speed grade military d.
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