NB3L553

NB3L553 2.5 V / 3.3 V / 5.0 V 1:4 Clock Fanout Buffer Description The NB3L553 is a low skew 1−to 4 clock fanout buffer, designed for clock distribution in mind. The NB3L553 specifically guarantees low output−to−output skew. Optimal design, layout and processing minimize skew within a device and from device to device. The output enable (OE) pin tri−states the outputs when low. Features Input/Output Clock Frequency up to 200 MHz Low Skew Outputs (35 ps) Output Enable Mode Three−States Outputs Operating Range: VDD = 2.375 V to 5.25 V Ideal for Networking Clocks Packaged in 8−pin SOIC Industrial Temperature Range These are Pb−Free Devices http://onsemi.com 8 1 SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS* 8 3L553 ALYW G 1 3N553 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package XX MG G Q1 Q2 CLK Q3 Q4 OE Figure 1. Block Diagram © Semiconductor Components Industries, LLC, 2006 March, 2006 − Rev. 0 1 DFN8 MN SUFFIX CASE 506AA 14 XX = Specific Device Code M = Date Code (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. PINOUT VDD Q0 Q1 GND 1 2 3 4 8 OE 7 Q3 6 Q2 5 ICLK ORDERING INFORMATION Device Package Shipping† NB3L553DG NB3L553DR2G SOIC−8 (Pb−Free) SOIC−8 (Pb−Free) 98 Units/Rail 2500/Tape & Reel NB3L553MNR4G* DFN−8 1000/Tape & Reel (Pb−Free) *Contact Sales Representative †For information on tape and reel specifications, including ...