KM62256DL

KM62256D Family Document Title 32Kx8 bit Low Power CMOS Static RAM Revision History Revision No History 0.0 Initial draft 0.1 First revision - KM62256DL/DLI ISB1 = 100 → 50µA KM62256DL-L ISB1 = 20 → 10µA KM62256DLI-L ISB1 = 50 → 15µA - CIN = 6 → 8pF, CIO = 8 → 10pF - KM62256D-4/5/7 Family tOH = 5 → 10ns - KM62256DL/DLI IDR = 50→30µA KM62256DL-L/DLI-L IDR = 30 → 15µA 1.0 Finalize - Remove ICC write value - Improved operating current ICC2 = 70 → 60mA - Improved standby current KM62256DL/DLI ISB1 = 50 → 30µA KM62256DL-L ISB1 = 10 → 5µA KM62256DLI-L ISB1 = 15 → 5µA - Improved data retention current KM62256DL/DLI IDR = 30 → 5µA KM62256DL-L/DLI-L IDR = 15 → 3µA - Remove 45ns part from commercial product and 100ns part from industrial product. Replace test load 100pF to 50pF for 55ns part CMOS SRAM Draft Data May 18, 1997 April 1, 1997 Remark Design target Preliminily November 11, 1997 Final The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices. Revision 1.0 November 1997 KM62256D Family CMOS SRAM 32Kx8 bit Low Power CMOS Static RAM FEATURES Process Technology : TFT Organization : 32Kx8 Power Supply Voltage : 4.5~5.5V Low Data Retention Voltage : 2V(Min) Three state output and TTL Compatible Package Type : 28-DIP-600B, 28-SOP-450 28-TS...