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K1867 Dataheets PDF



Part Number K1867
Manufacturers Panasonic
Logo Panasonic
Description Silicon N-Channel Power F-MOS FET
Datasheet K1867 DatasheetK1867 Datasheet (PDF)

Plehtatsp:e/M/vaiiwsniwttefw.nolsalenocmwiie/cnpolDgdiina.ssUncpceRoaodLnnnttiapidalinmsnbasuaouiocneneniuoetdtdcnd.ieltticnnaytnmocalp.eujaniuesepctn/ddtieeetentsnfyn/yfopaproelnelmdcoaetwitioynnpg.efourDisMcaionnttie Productnnu 18.0±0.5aendc Solder Dip lifecycle stage. Power F-MOS FETs 2SK1867 Silicon N-Channel Power F-MOS FET s Features q Avalanche energy capacity guaranteed: EAS > 15mJ q VGSS = ±30V guaranteed q High-speed switching: tf = 26ns q No secondary breakdown q Allowing to sup.

  K1867   K1867


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Plehtatsp:e/M/vaiiwsniwttefw.nolsalenocmwiie/cnpolDgdiina.ssUncpceRoaodLnnnttiapidalinmsnbasuaouiocneneniuoetdtdcnd.ieltticnnaytnmocalp.eujaniuesepctn/ddtieeetentsnfyn/yfopaproelnelmdcoaetwitioynnpg.efourDisMcaionnttie Productnnu 18.0±0.5aendc Solder Dip lifecycle stage. Power F-MOS FETs 2SK1867 Silicon N-Channel Power F-MOS FET s Features q Avalanche energy capacity guaranteed: EAS > 15mJ q VGSS = ±30V guaranteed q High-speed switching: tf = 26ns q No secondary breakdown q Allowing to supply by the radial taping s Applications q Contactless relay q Diving circuit for a solenoid q Driving circuit for a motor q Control equipment q Switching power supply s Absolute Maximum Ratings (TC = 25°C) Parameter Symbol Ratings Drain to Source breakdown voltage Gate to Source voltage Drain current DC Pulse Avalanche energy capacity VDSS VGSS ID IDP EAS* 900 ±30 ±2 ±6 15 Allowable power dissipation TC = 25°C PD Ta = 25°C 15 2 Channel temperature Tch Storage temperature Tstg * L = 7.5mH, IL = 2A, VDD = 50V, 1 pulse 150 −55 to +150 Unit V V A A mJ W °C °C s Electrical Characteristics (TC = 25°C) Parameter Symbol Conditions Drain to Source cut-off current IDSS Gate to Source leakage current IGSS Drain to Source breakdown voltage VDSS Gate threshold voltage Vth Drain to Source ON-resistance RDS(on) Forward transfer admittance | Yfs | Diode forward voltage VDSF Input capacitance (Common Source) Ciss Output capacitance (Common Source) Coss Reverse transfer capacitance (Common Source) Crss Turn-on time ton Fall time tf Turn-off time (delay time) td(off) Thermal resistance between channel and case Rth(ch-c) VDS = 900V, VGS = 0 VGS = ±30V, VDS = 0 ID = 1mA, VGS = 0 VDS = 25V, ID = 1mA VGS = 10V, ID = 2A VDS = 25V, ID = 2A IDR = 2A, VGS = 0 VDS = 20V, VGS = 0, f = 1MHz VGS = 10V, ID = 2A VDD = 200V, RL = 100Ω 13.0±0.2e/ 4.2±0.2 2.5±0.2 10.0±0.2 unit: mm 5.0±0.1 1.0 90˚ 0.35±0.1 1.2±0.1 0.65±0.1 1.05±0.1 0.55±0.1 C1.0 2.25±0.2 0.55±0.1 C1.0 1 2 3 2.5±0.2 2.5±0.2 1: Gate 2: Drain 3: Source MT4 Type Package min typ max Unit 0.1 mA ±1 µA 900 V 1 5V 3.8 4.85 Ω 1.5 2 S −1.6 V 730 pF 90 pF 40 pF 40 ns 35 ns 105 ns 8.33 °C/W 1 DrainPlcurrentehtatsp:e/M/vaIDiiwsniw(A)ttefw.nolsalenocmwiie/cnpolDgdiina.ssUncpceRoaodLnnnttiapidalinmsnbasuaouiocneneniuoetdtdcnd.ieltticnna Inputytnmocalp.euacapacitancejniuesepctn/ddtieeetentsnfyn(Common/yfopaproelnelmdcosource),aetwitioynOutputnpg.efcapacitanceour P(Commonrodsource),uct lifecycle stage. Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF) Forward transfer admittance |Yfs| (S) DrainotoisourcennvoltagettieVDSn(V)nuaendce Drain/current ID (A) Power F-MOS FETs ID  VGS 8 VDS=25V 7 6 25˚C 100˚C 5 TC=0˚C 150˚C 4 3 2 1 0 0 2 4 6 8 10 12 Gate to source voltage VGS (V) VDS  VGS 80 TC=25˚C 70 60 50 40 ID=6A 30 20 0.75A 3A 10 1.5A 0 0 5 10 15 20 25 30 Gate to source voltage VGS (V) PD  Ta 16 (1)TC=Ta 14 (2)Without heat sink (PD=2.0W) 12 10 (1) 8 6 4 2 (2) 0 0 20 40 60 80 100 120 140 160 Ambient temperature Ta (˚C) | Yfs |  ID 3.0 VDS=25V 2.4 TC=25˚C 1.8 100˚C 150˚C 1.2 0.6 0 012345 Drain current ID (A) Ciss, Coss, Crss  VDS 10000 3000 f=1MHz TC=25˚C 1000 300 Ciss 100 Coss 30 Crss 10 0 40 80 120 160 200 Drain to source voltage VDS (V) Area of safe operation (ASO) 100 Non repetitive pulse TC=25˚C 30 10 IDP 3 ID 1 t=100µs 0.3 1ms 0.1 10ms 100ms 0.03 DC 0.01 1 3 10 30 100 300 1000 Drain to source voltage VDS (V) Avalanche energy capacity EAS (mJ) Switching time ton,tf,td(off) (ns) Drain to source ON-resistance RDS(on) (Ω) 2SK1867 RDS(on)  ID 16 VGS=10V 14 12 TC=150˚C 10 100˚C 8 25˚C 6 0˚C 4 2 0 0123456 Drain current ID (A) ton, tf, td(off)  ID 150 VDD=200V VGS=10V TC=25˚C 120 90 td(off) 60 ton 30 tf 0 012345 Drain current ID (A) EAS  Tj 30 ID=2A 25 20 15 10 5 0 25 50 75 100 125 150 Junction temperature Tj (˚C) Allowable power dissipation PD (W)DisMca 2 Power F-MOS FETs Vth  TC 6 VDS=25V ID=1mA 5 4 3 2 1 0 0 25 50 75 100 125 150 Case temperature TC (˚C) Gate threshold voltage Vth (V) VDS, VGS  Qg 700 ID=3A 600 DiMscaoinntteinnuaendce/PlehattspMe://avwiisnwittwefno.sallenomcweiicn/pDogdlnaiisUs.npccReoaodLnnntapdtamiinslnibasuaouonceinenuoedidtctnde.ilttcnnaimynocatpeua.lnuejsepicndtd/eteeientnstynfy/opafporenemldlcoaewtitioynnpg.efour Product lifecycle stage. VDD L D.U.T PG RG VDD RL D.U.T PG RG Avalanche energy capacity test circuit Switching measurement circuit 00 0 10 20 30 40 50 Gate charge amount Qg (nC) 100 2 6 4 300 VGS 200 Drain to source voltage VDS (V) Gate to source voltage VGS (V) 10 8 500 VDS 400 14 12 2SK1867 3 Plehtatsp:e/M/vaiiwsniwttefw.nolsalenocmwiie/cnpolDgdiina.ssUncpceRoaodLnnnttiapidalinmsnbasuaouiocneneniuoetdtdcnd.ieltticnnaytnmocalp.eujaniuesepctn/ddtieeetentsnfyn/yfopaproelnelmdcoaetwitioynnpg.efourDisMcaionnttieProductnnulifecycleaenstage.dce/ Request for your special attention and precautions in using the techn.


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