932SQ420D Datasheet: PCIE GEN 2/3 & QPI CLOCK





932SQ420D PCIE GEN 2/3 & QPI CLOCK Datasheet

Part Number 932SQ420D
Description PCIE GEN 2/3 & QPI CLOCK
Manufacture IDT
Total Page 28 Pages
PDF Download Download 932SQ420D Datasheet PDF

Features: PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASE D SERVERS DATASHEET 932SQ420D General Description The 932SQ420D is a main cl ock synthesizer for Romley-generation I ntel based server platforms. The 932SQ4 20D is driven with a 25 MHz crystal for maximum performance. It generates CPU outputs of 100 or 133.33 MHz. Recommend ed Application CK420BQ Output Features • 4 - HCSL CPU outputs • 4 - HCSL N on-Spread SAS/SRC outputs • 3 - HCSL SRC outputs • 1 - HCSL DOT96 output 1 - 3.3V 48M output • 5 - 3.3V PCI outputs • 1- 3.3V REF output Block D iagram Features/Benefits • 0.5% down spread capable on CPU/SRC/PCI outputs/ Lower EMI • 64-pin TSSOP and MLF pack ages/Space Savings Key Specifications Cycle to cycle jitter: CPU/SRC/NS_SR C/NS_SAS < 50ps. • Phase jitter: PCIe Gen2 < 3ps rms, Gen3 < 1ps rms • Pha se jitter: QPI 9.6GB/s < 0.2ps rms • Phase jitter: NS-SAS < 0.4ps rms using raw phase data • Phase jitter: NS-SAS < 1.3ps rms using Clk Jit Tool 1.6.3 X1_25 X2 CPU_SRC_PCI PL.

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PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
DATASHEET
932SQ420D
General Description
The 932SQ420D is a main clock synthesizer for
Romley-generation Intel based server platforms. The
932SQ420D is driven with a 25 MHz crystal for maximum
performance. It generates CPU outputs of 100 or 133.33
MHz.
Recommended Application
CK420BQ
Output Features
4 - HCSL CPU outputs
4 - HCSL Non-Spread SAS/SRC outputs
3 - HCSL SRC outputs
1 - HCSL DOT96 output
1 - 3.3V 48M output
5 - 3.3V PCI outputs
1- 3.3V REF output
Block Diagram
Features/Benefits
0.5% down spread capable on CPU/SRC/PCI
outputs/Lower EMI
64-pin TSSOP and MLF packages/Space Savings
Key Specifications
Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS <
50ps.
Phase jitter: PCIe Gen2 < 3ps rms, Gen3 < 1ps rms
Phase jitter: QPI 9.6GB/s < 0.2ps rms
Phase jitter: NS-SAS < 0.4ps rms using raw phase data
Phase jitter: NS-SAS < 1.3ps rms using Clk Jit Tool 1.6.3
X1_25
X2
CPU_SRC_PCI
PLL (SS)
Low Drift non-SS
PLL
<500ps LTJ
Non-SS PLL
CPU(3:0)
SRC(2:0)
/3 PCI(4:0)
NS_SAS(1:0)
NS_SRC(1:0)
DOT96
/2 48M
Test_Sel
Test_Mode
100M_133M#
CKPWRGD#/PD
SMBDAT
SMBCLK
Logic
14.31818MHz
Non-SS PLL
REF14M
IREF
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
1
932SQ420D
REV J 010715

                    
                    






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