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SGN01G64C1CQ1SA-DCRT

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204 Pin SO-DIMM

Data Sheet Rev.1.0 18.02.2014 1024MB DDR3 – SDRAM SO-DIMM 204 Pin SO-DIMM Features: SGN01G64C1CQ1SA-XX[E/W]RT  20...


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SGN01G64C1CQ1SA-DCRT

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Data Sheet Rev.1.0 18.02.2014 1024MB DDR3 – SDRAM SO-DIMM 204 Pin SO-DIMM Features: SGN01G64C1CQ1SA-XX[E/W]RT  204-pin 64-bit DDR3 Small Outline Dual-In-Line Double 1GByte in FBGA Technology Data Rate Synchronous DRAM module  Module organization: single rank 128M x 64 RoHS compliant  VDD = 1.5V ±0.075V, VDDQ 1.5V ±0.075V  1.5V I/O ( SSTL_15 compatible) Options:  Fly-by-bus with termination for C/A & CLK bus  On-board I2C temperature sensor with integrated serial presence-detect (SPD) EEPROM  Data Rate / Latency DDR3 1333 MT/s CL9 Marking -CC  Gold-contact pads  This module is fully pin and functional compatible to the DDR3 1600 MT/s CL11 -DC JEDEC PC3-12800 spec. and JEDEC- Standard MO-268.  Module Density 1GByte with 4 dies and 1 rank (see www.jedec.org)  The pcb and all components are manufactured according to the RoHS compliance specification [EU Directive  Standard Grade Grade E Grade W (TA) 0°C to 70°C (TC) 0°C to 85°C  (TA) (TC) (TA) (TC) 0°C to 85°C 0°C to 95°C *) -40°C to 85°C -40°C to 95°C *)    2002/95/EC Restriction of Hazardous Substances (RoHS)] DDR3 - SDRAM component Samsung K4B2G1646Q 128Mx16 DDR3 SDRAM in PG-TFBGA-96 package 8-bit pre-fetch architecture Programmable CAS Latency, CAS Write Latency, Additive Latency, Burst Length and Burst Type.  On-Die-Termination (ODT) and Dynamic ODT for improved *) The refresh rate has to be doubled when 85°C



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