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CMU5N50

Cmos

N-Channel Transistor

CMD5N50/CMU5N50 General Description These N-Channel enhancement mode power field effect transistors are produced using ...


Cmos

CMU5N50

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Description
CMD5N50/CMU5N50 General Description These N-Channel enhancement mode power field effect transistors are produced using advanced technology which has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supplies, power factor correction and electronic lamp ballasts based on half bridge. Product Summery BVDSS 500V RDSON 1.5 July 2011 ID 4.5A Features TO252 / TO251 Pin Configuration Low gate charge (typical 27 nC) Low Crss ( typical 17 pF) Fast switching 100%avalanche tested Improved dv/dt capability D G S TO252 G D S TO251 (CMD5N50) (CMU5N50) Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage ID Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) IDM Drain Current - Pulsed (Note 1) VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) EAR Repetitive Avalanche Energy (Note 1) dv/dt Peak Diode Recovery dv/dt (Note 3) PD Power Dissipation (TC = 25°C) - Derate above 25°C TJ, TSTG Operating and Storage Temperature Range TL Maximum lead temperature for soldering purposes, 1/8�from case for 5 seconds * Drain current limited by maximum junction temperature CMD5N50/CMU5N50 500 4.5 2.9 15 ±30 500 4.5 7.3 5.5 50 0.58 -55 to +150 300 Units V A A A V mJ A mJ V/n...




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