®®
ADC-HX, ADC-HZ Series
12-Bit, 8 and 20μsec Analog-to-Digital Converters
FEATURES
12-bit resolution 8 or 20 microsecond conversion times 5 input voltage ranges Internal high Z input buffer Short-cycle operation MIL-STD-883 models available
+15V POWER 28
–15V POWER 31
PRODUCT OVERVIEW
The ADC-HX and ADC-HZ Series are self-
Both models have identical operation except for
contained, high-performance, 12-bit A/D convert- conversion speed. They can be short-cycled to give
ers manufactured with thick and thin-film hybrid faster conversions in lower-resolution applica-
technology. They use the successive approximation tions. Use of the internal buffer amplifier increases
conversion technique to achieve a 12-bit conver- conversion time by 3 microseconds, the settling
sion in 20 and 8 microseconds, respectively. Five time of the amplifier. Output coding is comple-
input voltage ranges are programmable by external mentary binary, complementary offset binary, or
pin connection. An internal buffer amplifier is also complementary two’s complement. Serial data is
provided for applications in which 50 megohm
also brought out. The package is a 32-pin ceramic
input impedance is required.
TDIP. Models are available for use in commercial
These converters utilize a fast 12-bit monolithic (0 to +70°C), industrial (–40 to +100°C), or military
DAC which includes a precision zener reference
(–55 to +125°C) operating temperature ranges.
source. The circuit also contains a fast mono-
MIL-STD-883 and DESC Standard Military Drawing
lithic comparator, a monolithic 12-bit successive models are also available.
approximation register, a clock and a monolithic
buffer amplifier. Nonlinearity is specified at ±1/2LSB maximum.
INPUT/OUTPUT CONNECTIONS
Pin Function Pin Function
1 BIT 12 (LSB)
32 SERIAL DATA OUTPUT
2 BIT 11
31 –15V POWER
3 BIT 10
30 BUFFER INPUT
4 BIT 9
29 BUFFER OUTPUT
5 BIT 8
28 +15V POWER
6 BIT 7
27 GAIN ADJUST
7 BIT 6
26 ANALOG COMMON
8 BIT 5
25 20V INPUT RANGE
9 BIT 4
24 10V INPUT RANGE
10 BIT 3
23 BIPOLAR OFFSET
11 BIT 2
22 COMPARATOR INPUT
12 BIT 1 (MSB)
21 START CONVERT
13 BIT 1 (MSB)
20 E.O.C. (STATUS)
14 SHORT CYCLE
19 CLOCK OUT
REF. OUT 18
+5V POWER 16
15 DIGITAL COMMON 16 +5V POWER
18 REFERENCE OUT 17 CLOCK RATE
BUFFER INPUT
30
BUFFER 29 OUTPUT
BIPOLAR OFFSET
23
COMPARATOR 22 INPUT
10V INPUT
24
20V INPUT
25
ANALOG COMMON
26
BUFFER + AMPLIFIER
6.3kW
5kW COMPARATOR 5kW
CLOCK
PRECISION REF (+6.3V)
12-BIT DAC
SUCCESSIVE APPROXIMATION
REGISTER
GAIN 27 ADJUST
15
DIGITAL COMMON
14 SHORT CYCLE
20
E.O.C. STATUS
17
CLOCK RATE
19 21 1 2 3 4 5 6 7 8 9 10 11 12 13
CLOCK START 12 11 10 9 8 7 6 5 4 3 2 1 1
OUT CONV. LSB.
BIT NO.
MSB MSB
PARALLEL DATA OUT
Figure 1. Functional Block Diagram
32
SERIAL DATA OUT
DATEL
• 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail:
[email protected] ADC-HXHZ.C01 Page 1 of 7
®®
ADC-HX, ADC-HZ Series
12-Bit, 8 and 20μsec Analog-to-Digital Converters
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+15V Supply, Pin 28 –15V Supply, Pin 31 +5V Supply, Pin 16 Digital Inputs, Pins 14, 21 Analog Inputs, Pins 24, 25 Buffer Input, Pin 30 Lead Temperature (10 seconds)
LIMITS
+18 –18 +7 ±5.5 ±25 ±15 300
UNITS
Volts Volts Volts Volts Volts Volts °C
Functional Specifications
(Typical at +25°C and ±15V and +5V supplies unless otherwise noted)
INPUTS
ADC-HX12B
ADC-HZ12B
Analog Input Ranges Unipolar Bipolar Input Impedance
Input Impedance with Buffer Input Bias Current of Buffer Start Conversion
0 to +5V, 0 to +10V ±2.5V, ±5V, ±10V 2.5k (0 to +5V, ±2.5V) 5k (0 to +10V, ±5V) 10k (±10V) 50 megohms 125nA typical, 250nA max. +2V min. to +5.5V max. positive pulse with duration of 100ns min. Rise and fall times <30ns. Logic "1" to "0" transition resets converter and initiates next conversion. Loading: 2 TTL loads.
PERFORMANCE
Resolution Nonlinearity Differential Nonlinearity Accuracy Error ➀ Gain (before adjustment) Zero, Unipolar (before adj.) Offset, Bipolar (before adj.) Temperature Coefficient Gain Zero, Unipolar Offset, Bipolar Diff. Nonlinearity Tempco No Missing Codes Conversion Time ➂ 12 Bits 10 Bits ➃ 8 Bits ➃ Buffer Settling Time (10V step) Power Supply Rejection
12 bits ±1/2LSB max. ±3/4LSB max.
±0.2% ±0.1% of FSR ➁ ±0.2% of FSR ➁
±20ppm/°C max. ±5ppm/°C of FSR max. ➁ ±10ppm/°C of FSR max. ➁ ±2ppm/°C of FSR max. ➁ Over opererating temperature range
20μs max. 15μs max. 10μs max. 3μs to ±0.01% ±0.004%/% supply max.
8μs max. 6μs max. 4μs max.
OUTPUTS ➄
Parallel Output Data
Unipolar Coding Bipolar Coding Serial Output Data End of Conversion (Status)
Clock Output
Internal Reference Reference Tempco External Reference Current
12 parallel lines of data held until next conversion command. VOUT ("0") ≤ +0.4V VOUT ("1") ≥ +2.4V Complementary binary Complementary offset binary Complementary two’s complement NRZ successive decision pulses out, MSB first. Compl. binary or comp.