Document
DTC114EM3T5G Series
Digital Transistors (BRT)
NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network. The digital transistor contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. The digital transistor eliminates these individual components by integrating them into a single device. The use of a digital transistor can reduce both system cost and board space. The device is housed in the SOT−723 package which is designed for low power surface mount applications.
Features
• Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • The SOT−723 Package can be Soldered using Wave or Reflow. • Available in 4 mm, 8000 Unit Tape & Reel • These are Pb−Free Devices
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50 Vdc
Collector-Emitter Voltage
VCEO
50 Vdc
Collector Current
IC 100 mAdc
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
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NPN SILICON DIGITAL TRANSISTORS
PIN 1 BASE (INPUT)
R1 R2
PIN 3 COLLECTOR
(OUTPUT)
PIN 2 EMITTER (GROUND)
3
2 1
SOT−723 CASE 631AA
STYLE 1
MARKING DIAGRAM xx
M
xx = Specific Device Code (See Marking Table on page 2)
M = Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 3
1
Publication Order Number: DTC114EM3/D
DTC114EM3T5G Series
DEVICE MARKING AND RESISTOR VALUES
Device DTC114EM3T5G
Marking 8A
R1 (K) 10
R2 (K) 10
Package
Shipping†
DTC124EM3T5G
8B 22 22
DTC144EM3T5G
8C 47 47
DTC114YM3T5G
8D 10 47
DTC114TM3T5G
8E 10 ∞
DTC143TM3T5G
8F 4.7 ∞
DTC123EM3T5G DTC143EM3T5G
8H 8J
2.2 2.2 SOT−723 4.7 4.7 (Pb−Free)
8000/Tape & Reel
DTC143ZM3T5G*
8K 4.7 47
DTC124XM3T5G*
8L 22 47
DTC123JM3T5G
8M 2.2 47
DTC115EM3T5G
8N 100 100
DTC144WM3T5G*
8P 47 22
DTC144TM3T5G
8T 47 ∞
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
*Available upon request.
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation, FR−4 Board (Note 1) @ TA = 25°C Derate above 25°C
Thermal Resistance, Junction−to−Ambient (Note 1)
Total Device Dissipation, FR−4 Board (Note 2) @ TA = 25°C Derate above 25°C
Thermal Resistance, Junction−to−Ambient (Note 2)
Junction and Storage Temperature Range
1. FR−4 @ minimum pad. 2. FR−4 @ 1.0 × 1.0 inch .