DISCRETE SEMICONDUCTORS
DATA SHEET
2N7002 N-channel vertical D-MOS transistor
Product specification File under Discrete ...
DISCRETE SEMICONDUCTORS
DATA SHEET
2N7002 N-channel vertical D-MOS
transistor
Product specification File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
N-channel vertical D-MOS
transistor
Product specification
2N7002
FEATURES Direct interface to C-MOS, TTL,
etc. High-speed switching No secondary breakdown.
DESCRIPTION
N-channel enhancement mode vertical D-MOS
transistor in a SOT23 envelope. It is designed for use as a Surface Mounted Device (SMD) in thin and thick-film circuits, with applications in relay, high-speed and line transformer drivers.
PINNING - SOT23
PIN DESCRIPTION 1 gate 2 source 3 drain
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDS ID RDS(on)
drain-source voltage drain current drain-source on-resistance
VGS(th)
gate-source threshold voltage
CONDITIONS
DC value ID = 500 mA VGS = 10 V ID = 1 mA VGS = VDS
MAX. UNIT 60 V 180 mA 5Ω
3V
PIN CONFIGURATION
ook, halfpage
3
handbook, 2 columns
d
1 Top view
2
MSB003
g MBB076 - 1 s
Marking code: 702
Fig.1 Simplified outline and symbol.
April 1995
2
Philips Semiconductors
N-channel vertical D-MOS
transistor
Product specification
2N7002
LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
VDS ±VGSO ID IDM Ptot
drain-source voltage gate-source voltage drain current drain current total power dissipation
Tstg storage temperature range Tj junction temperature
open drain
DC value
peak value
Tamb = 25 °C (note 1) (note 2)
Not...