64 K x 16 DRAM
(OLWH07
DRAM
FEATURES
y X16 organization y EDO (Extended Data-Output) access mode y 2 CAS Byte/Word Read/Write operati...
Description
(OLWH07
DRAM
FEATURES
y X16 organization y EDO (Extended Data-Output) access mode y 2 CAS Byte/Word Read/Write operation
y Single 5V ( ± 10%) power supply y TTL-compatible inputs and outputs y 256-cycle refresh in 4ms y Refresh modes : RAS only, CAS BEFORE RAS (CBR)
and HIDDEN y JEDEC standard pinout y Key AC Parameter
tRAC
tCAC
tRC
tPC
-25 25 8 43 10
-30 30 9 55 12
-35 35 10 65 14
-40 40 11 75 16
M11B11664A 64 K x 16 DRAM
EDO PAGE MODE
ORDERING INFORMATION - PACKAGE
40-pin 400mil SOJ 44 / 40-pin 400mil TSOP (TypeII)
PRODUCT NO.
M11B11664A-25J M11B11664A-30J M11B11664A-35J M11B11664A-40J M11B11664A-25T M11B11664A-30T M11B11664A-35T M11B11664A-40T
PACKING TYPE SOJ
TSOPII
GENERAL DESCRIPTION
The M11B11664A is a randomly accessed solid state memory, organized as 65,536 x 16 bits device. It offers Extended Data-Output , 5V( ± 10%) single power supply. Access time (-25,-30,-35,-40) and package type (SOJ, TSOP II) are optional features of this family. All these family have CAS - before - RAS , RAS -only refresh and Hidden refresh capabilities.
Two access modes are supported by this device : Byte access and Word access. Use only one of the two CAS and leave the other staying high will result in a BYTE access. WORD access happens when two CAS ( CASL , CASH ) are used. CASL transiting low during READ or WRITE cycle will output or input data into the lower byte (IO0~IO7), and CASH transiting low will output or input data into the upper byte (IO8~15).
PIN ASSIGNMENT
SOJ ...
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