Document
LM108A/LH2108A
Precision Operational Amplifiers
www.fairchildsemi.com
Features
• Low input bias current — 2 nA • Low input offset current — 200 pA • Low input offset voltage — 500mV • Low input offset drift — 5 mV/°C • Wide supply range — ±3V to ±20V • Low supply current — 0.6 mA • High PSRR — 96 dB • High CMRR — 96 dB • MIL-STD-883B available
Description
The LM108A operational amplifiers features low input bias current combined with the advantages of bipolar transistor construction; input offset voltages and currents are kept low over a wide range of temperature and supply voltage. Fairchild Semiconductor’s superbeta bipolar manufacturing process includes extra treatment at epitaxial growth to ensure low input voltage noise.
The LH2108 consists of two LM108 ICs in one 16-lead DIP. The “A” versions meet tighter electrical specifications than the plain versions. All types are available with 883B military screening.
Rev 1.0.0
LM108A/LH2108A
PRODUCT SPECIFICATION
Pin Assignments
8-Lead Metal Can (Top View)
Comp 1
Comp 8 +VS
7
-Input 2
6 Output
35
+Input
4 NC
-VS
8-Lead DIP (Top View)
Comp 1 -Input 2 +Input 3
-VS 4
8 Comp 7 +VS 6 Output 5 NS
65-108A-01
16-Lead DIP (Top View)
+VS (A) 1 Comp (A) 2 Comp/VOS Trim (A) 3 -Input (A) 4 +Input (A) 5
-VS 6 NC 7 Output (B) 8
16 Output (A) 15 NC 14 VOS Trim 13 +Input (B) 12 -Input (B) 11 Comp/VOS Trim (B) 10 Comp (B) 9 +VS (B)
65-108A-02
Absolute Maximum Ratings
Parameter Supply Voltage Differential Input Current1 Input Voltage2 Output Short-Circuit Duration2 Operating Temperature Range Storage Temperature Range Lead Soldering Temperature (60 seconds)
Min.
-55 -65
Max. ±20 ±10 ±15 Continuous +125 +150 +300
Units V mA V
°C °C °C
Notes:
1. The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore, if a differential input voltage in excess of 1V is applied between the inputs, excessive current will flow, unless some limiting resistance is provided.
2. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
2
PRODUCT SPECIFICATION
LM108A/LH2108A
Thermal Characteristics
Parameter Maximum Junction Temperature Max. PDTA < 50°C Thermal Resistance, qJC Thermal Resistance, qJA For TA > 50°C Derate at
8-Lead Metal Can
+175°C 658 mW 50°C/W 190°C/W 5.26 mW/°C
8-Lead Ceramic DIP
+175°C 833 mW 45°C/W 150°C/W 8.33 mW/°C
16-Lead Ceramic DIP
+175°C 1042 mW 60°C/W 120°C/W 8.38 mW/°C
Electrical Characteristics
±5V, £ VS £ ±20V and TA £ +25°C unless otherwise noted LM108A/LH2108A
Parameters
Test Conditlons
Min. Typ. Max.
Input Offset Voltage
0.3 0.5
Input Offset Current
0.05 0.2
Input Bias Current
0.8 2.0
Input Resistance1
30 70
Large Signal Voltage Gain
VS = ±15V, VOUT ±10V, RL ³ 10KW
80 300
Supply Current
Each Amplifier
0.3
±5V, £ VS £ ±20V; -55°C £ TA £ +25°C unless otherwise noted
Input Offset Voltage
0.4
0.6 1.0
Avg. Input Offset Voltage Drift2
1.0 5.0
Input Offset Current
0.1 0.4
Avg. lnput Offset Current Drift2
0.5 2.5
Input Bias Current Large Signal Voltage Gain
Output Voltage Swing
Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio Supply Current
VS = ±15V, VOUT = ±10V, RL ³ 10 KW RL ³ 10 KW, VS = ±20V VS = ±15V VCM = ±13.5V, VS = ±15V VS = ±15V
Each Amplifier
1.0 3.0 40 200
±16 ±18
±13.5 96 110
96 110
0.6
Notes: 1. Guaranteed by input bias current specification. 2. Sample tested.
LM108/LH2108 Min. Typ. Max.
0.7 2.0 0.05 0.2 0.8 2.0 30 70 50 300
0.3 0.6
1.0 3.0 3.0 15
0.1 0.4 0.5 2.5
1.0 3.0 25 200
±16 ±18
±13.5 85 100
80 96
0.6
Units mV nA nA MW V/mV
mA
mV mV/°C
nA pA/°C
nA V/mV
V
V dB
dB
mA
3
LM108A/LH2108A
Typical Applications
The LM108 series has very low input offset and bias currents; the user is cautioned that printed circuit board leakages can produce significant errors especially at high board temperatures. Careful attention to board layout and
PRODUCT SPECIFICATION
cleaning procedure is required to achieve the LM108A’s rated performance. It is suggested that board leakage be minimized by encircling the input pins with a guard ring maintained at a potential close to that of the inputs. The guard ring should be driven by a low impedance source such as an amplifier’s output or ground.
+VS
R3 50K
R1 200K
-VS
R5
R4 2
R2
LM108 6 3
100
VOUT
( (Range = ±VS R2
+VIN
R1
( (R5
Gain = 1 + R4 + R2
65-2652
Figure 1. Offset Adjustment for Non-Inverting Amplifiers
R1 -VIN
R2
+VIN
2
R3
LM108 6 38
VOUT
1 CF*
*Bandwidth and slew rate are proportional to 1/CF
( (CF > R1 CL R1 + R2 CL = Load Capacitance
65-2653
Figure 2. Standard Compensation Circuit
R2
-VIN +VIN
R1 2
R1
LM108 6 3
+VS
VOUT
R3 R5
20K R6
25K
R4 R2 = R3 + R4
( (( (10
-VS
Range = ±VS R5 R2 R4
R1 R1 + R3
Gain =
R1
65-2654
Figure 3. Offset Adjustment for Differential Amplifiers
-VIN +VIN
R1 R2
2
R3
LM108 6 3
8**
CS 100 pF
VOUT
*Improves rejection of power supply noise by a factor of 10. **Bandwidth and slew rate a.