16M x 16 bit DDR Synchronous DRAM
AS4C16M16D1
16M x 16 bit DDR Synchronous DRAM (SDRAM)
Alliance Memory Confidential
Advanced (Rev. 1.1, Sep. /2011)
F...
Description
AS4C16M16D1
16M x 16 bit DDR Synchronous DRAM (SDRAM)
Alliance Memory Confidential
Advanced (Rev. 1.1, Sep. /2011)
Features
Fast clock rate: 200MHz
Differential Clock CK & CK
Bi-directional DQS DLL enable/disable by EMRS Fully synchronous operation Internal pipeline architecture Four internal banks, 4M x 16-bit for each bank Programmable Mode and Extended Mode registers
- CAS Latency: 2, 2.5, 3
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleaved
Individual byte-write mask control DM Write Latency = 0 Auto Refresh and Self Refresh 8192 refresh cycles / 64ms Operating temperature range
- Commercial (0 ~ 70°C)
- Industrial (-40 ~ 85°C)
Precharge & active power down Power supplies: VDD & VDDQ = 2.5V 0.2V Interface: SSTL_2 I/O Interface Package: 66 Pin TSOP II, 0.65mm pin pitch
- Pb free and Halogen free
Package: 60-Ball, 8x13x1.2 mm (max) TFBGA - Pb free and Halogen Free
Overview
The AS4C16M16D1 SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 256 Mbits. It is internally configured as a quad 4M x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur
at both rising edges of CK and CK .d Read and write
accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then...
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