DatasheetsPDF.com

STM32F103ZG Dataheets PDF



Part Number STM32F103ZG
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description XL-density performance line ARM-based 32-bit MCU
Datasheet STM32F103ZG DatasheetSTM32F103ZG Datasheet (PDF)

STM32F103xF STM32F103xG XL-density performance line ARM-based 32-bit MCU with 768 KB to 1 MB Flash, USB, CAN, 17 timers, 3 ADCs, 13 communication interfaces Target specification Features ■ Core: ARM 32-bit Cortex™-M3 CPU with MPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division ■ Memories – 768 Kbytes to 1 Mbyte of Flash memory – 96 Kbytes of SRAM – Flexible static memory controller with 4 Ch.

  STM32F103ZG   STM32F103ZG


Document
STM32F103xF STM32F103xG XL-density performance line ARM-based 32-bit MCU with 768 KB to 1 MB Flash, USB, CAN, 17 timers, 3 ADCs, 13 communication interfaces Target specification Features ■ Core: ARM 32-bit Cortex™-M3 CPU with MPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division ■ Memories – 768 Kbytes to 1 Mbyte of Flash memory – 96 Kbytes of SRAM – Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM, PSRAM, NOR and NAND memories – LCD parallel interface, 8080/6800 modes ■ Clock, reset and supply management – 2.0 to 3.6 V application supply and I/Os – POR, PDR, and programmable voltage detector (PVD) – 4-to-16 MHz crystal oscillator – Internal 8 MHz factory-trimmed RC – Internal 40 kHz RC with calibration – 32 kHz oscillator for RTC with calibration ■ Low power – Sleep, Stop and Standby modes – VBAT supply for RTC and backup registers ■ 3 × 12-bit, 1 µs A/D converters (up to 21 channels) – Conversion range: 0 to 3.6 V – Triple-sample and hold capability – Temperature sensor ■ 2 × 12-bit D/A converters ■ DMA: 12-channel DMA controller – Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs ■ Debug mode – Serial wire debug (SWD) & JTAG interfaces – Cortex-M3 Embedded Trace Macrocell™ FBGA LQFP64 10 × 10 mm, LQFP100 14 × 14 mm, LQFP144 20 × 20 mm LFBGA144 10 × 10 mm ■ Up to 112 fast I/O ports – 51/80/112 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant ■ Up to 17 timers – Up to ten 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input – 2 × 16-bit motor control PWM timers with dead-time generation and emergency stop – 2 × watchdog timers (Independent and Window) – SysTick timer: a 24-bit downcounter – 2 × 16-bit basic timers to drive the DAC ■ Up to 13 communication interfaces – Up to 2 × I2C interfaces (SMBus/PMBus) – Up to 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control) – Up to 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed – CAN interface (2.0B Active) – USB 2.0 full speed interface – SDIO interface ■ CRC calculation unit, 96-bit unique ID ■ ECOPACK® packages Table 1. Device summary Reference Part number STM32F103xF STM32F103RF STM32F103VF STM32F103ZF STM32F103xG STM32F103RG STM32F103VG STM32F103ZG January 2012 Doc ID 16554 Rev 3 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. 1/120 www.st.com 1 Contents Contents STM32F103xF, STM32F103xG 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.3.1 ARM® Cortex™-M3 core with embedded Flash and SRAM . . . . . . . . . 15 2.3.2 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.3.3 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.3.4 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 15 2.3.5 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.6 FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.7 LCD parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.8 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16 2.3.9 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.10 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.11 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.12 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.13 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.14 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.15 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.16 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.17 RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 19 2.3.18 Timers and watchdogs . . . . . . . . . . . . . . . . . . .


STM32F103VG STM32F103ZG UPD424210


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)